US4336550A
Expired / Lapsed
US
⏱️ 0.0 years remaining
CMOS Device with silicided sources and drains and method
Assignee: Intersil Corp
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Filing: 1980-03-20
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Granted: 1982-06-22
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Expires: 2000-03-20
Abstract
Abstract A novel insulated gate field effect device is described wherein the device, having been formed from an island of semiconductive material on an insulative substrate, is characterized by the absence of discrete drain and source zones. The device further includes a gate structure and shallow metal silicided contact areas on the surface of the island adjacent the gate structure.
Inventors
- 👤 Lawrence B. Medwin
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-24 23:33
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D30/00; H10D30/60; H10D30/67; H10D30/6704; H10D30/6713; H10D30/6729; H10D30/6737; H10D30/6739; H10D30/674; H10D30/6741; H10D30/6743; H10D64/00; H10D64/60; H10D64/64; H10D64/647; H10D86/00; Y; Y10; Y10S; Y10S148/00; Y10S148/147
Claims Analysis
Total Claims: 3
Claim 1
Independent Claim
120 words
A thin film deep depletion circuit device comprising: first and second insulated gate field effect transistors formed from an island of semiconductor material of first and second respective opposite conductivity types, the transistors formed on an insulative substrate selected from the group consisting of sapphire, spinel and monocrystalline beryllium oxide; each transistor being characterized by the absence of discrete drain and source zones; and each transistor further including; a gate structure on only a portion of the surface of the island associated with each transistor and insulated therefrom; shallow metal silicided areas on the remainder of the surface of the island adjacent each gate structure; and lead lines in ohmic contact with the silicided areas and with each gate structure.
Claim 2
Dependent Claim
120 words
A thin film deep depletion circuit device comprising: first and second insulated gate field effect transistors formed from an island of semiconductor material of first and second respective opposite conductivity types, the transistors formed on an insulative substrate selected from the group consisting of sapphire, spinel and monocrystalline beryllium oxide; each transistor being characterized by the absence of discrete drain and source zones; and each transistor further including; a gate structure on only a portion of the surface of the island associated with each transistor and insulated therefrom; shallow metal silicided areas on the remainder of the surface of the island adjacent each gate structure; and lead lines in ohmic contact with the silicided areas and with each gate structure.
Claim 3
Dependent Claim
51 words
The thin film device of claim 1, wherein each gate structure comprises: a strip of polycrystalline silicon insulated from the surface of the island by a layer of silicon dioxide; and shallow metal silicided areas on those surfaces of each polycrystalline silicon strip not in contact with the silicon dioxide layer.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1985-06-21 | 1985-12-21 | 1986-06-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1989-06-21 | 1989-12-21 | 1990-06-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1993-06-21 | 1993-12-21 | 1994-06-22 | $7700.00 | Window Closed / Lapsed |