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Method of making a dielectric for an integrated circuit

Assignee: Nokia of America Corp
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Filing: 1996-12-31
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Granted: 1999-09-28
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Expires: 2016-12-31
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Abstract

Abstract A composite 3-layer gate dielectric is disclosed. The upper and lower layers have a concentration of nitrogen atoms, while the middle layer has very few nitrogen atoms. The presence of the nitrogen atoms in the top sublayers provides resistance to boron diffusion from the top conductive layer and plasma damage during polysilicon gate stack formation and the presence of nitrogen in the bottom sublayer near the silicon-dielectric interface improves wearout, endurance, resistance to current stress and electron traps.

Inventors

  • 👤 Yi Ma
  • 👤 Pradip Kumar Roy
  • 👤 Kevin Yun-Kang Wu

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 02:47
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01332; H10D64/01336; H10D64/0134; H10D64/01344; H10D64/60; H10D64/66; H10D64/68; H10D64/681; H10D64/685; H10D64/693

Claims Analysis

Total Claims: 14
Claim 1
Independent Claim 179 words
A method of integrated circuit fabrication in a single chamber comprising; forming a MOSFET by: forming a MOSFET gate dielectric upon a silicon crystalline substrate by; forming a first dielectric layer upon said substrate in the presence of nitrogen, wherein said first dielectric layer has a thickness of from about 5 Angstroms up to about 20 Angstroms; forming a second dielectric layer upon said first dielectric layer in the absence of any significant amount of nitrogen, wherein said second dielectric layer has a thickness of from about 5 Angstroms up to about 30 Angstroms, and wherein said second layer consists essentially of silicon dioxide; and forming a third dielectric layer upon said second dielectric layer in the presence of nitrogen, wherein said third dielectric layer has a thickness of from about 5 Angstroms up to about 20 Angstroms; said first, second and third dielectrics comprising said MOSFET gate dielectric; forming a conductive layer upon said gate dielectric; patterning said conductor to form a gate conductor; forming a source and drain; and forming alternating layer of patterned dielectrics and metalization.
Claim 2
Independent Claim 179 words
A method of integrated circuit fabrication in a single chamber comprising; forming a MOSFET by: forming a MOSFET gate dielectric upon a silicon crystalline substrate by; forming a first dielectric layer upon said substrate in the presence of nitrogen, wherein said first dielectric layer has a thickness of from about 5 Angstroms up to about 20 Angstroms; forming a second dielectric layer upon said first dielectric layer in the absence of any significant amount of nitrogen, wherein said second dielectric layer has a thickness of from about 5 Angstroms up to about 30 Angstroms, and wherein said second layer consists essentially of silicon dioxide; and forming a third dielectric layer upon said second dielectric layer in the presence of nitrogen, wherein said third dielectric layer has a thickness of from about 5 Angstroms up to about 20 Angstroms; said first, second and third dielectrics comprising said MOSFET gate dielectric; forming a conductive layer upon said gate dielectric; patterning said conductor to form a gate conductor; forming a source and drain; and forming alternating layer of patterned dielectrics and metalization.
Claim 3
Dependent Claim 36 words
The method of claim 1 in which said first layer is formed by exposing said substrate to an atmosphere containing a gas chosen from the group consisting of N 2 O, NO and NO 2 .
Claim 4
Dependent Claim 36 words
The method of claim 1 in which said third layer is formed by exposing said substrate to an atmosphere containing a gas chosen from the group consisting of N 2 O, NO and NO 2 .
Claim 5
Dependent Claim 25 words
The method of claim 2 in which said first layer is formed by exposing said substrate at a temperature between 650° C. and 1000° C.
Claim 6
Dependent Claim 25 words
The method of claim 2 in which said third layer is formed by exposing said substrate at a temperature between 650° C. and 1000° C.
Claim 7
Dependent Claim 20 words
The method of claim 1 in which the thickness of said first layer is between 5 A° and 20 A°.
Claim 8
Dependent Claim 20 words
The method of claim 1 in which the thickness of said second layer is between 5 A° and 30 A°.
Claim 9
Dependent Claim 20 words
The method of claim 1 in which the thickness of said third layer is between 5 A° and 20 A°.
Claim 10
Dependent Claim 15 words
The method of claim 1 in which said gate conductor is polysilicon doped with boron.
Claim 11
Dependent Claim 110 words
A process of fabricating a dielectric in a furnace comprising the steps of forming the dielectric upon a substrate by; exposing the substrate to a nitrogen based oxide at a furnace temperature to form a first dielectric layer having a thickness of from about 5 Angstroms up to about 20 A°; subjecting the substrate to an oxygen based ambient to form a second dielectric layer having a thickness of from about 5 Angstroms up to about 30 A°; and exposing the substrate to a nitrogen based oxide at a annealing-furnace temperature to form a third dielectric layer having a thickness of from about 5 Angstroms up to about 20 A°.
Claim 12
Dependent Claim 110 words
A process of fabricating a dielectric in a furnace comprising the steps of forming the dielectric upon a substrate by; exposing the substrate to a nitrogen based oxide at a furnace temperature to form a first dielectric layer having a thickness of from about 5 Angstroms up to about 20 A°; subjecting the substrate to an oxygen based ambient to form a second dielectric layer having a thickness of from about 5 Angstroms up to about 30 A°; and exposing the substrate to a nitrogen based oxide at a annealing-furnace temperature to form a third dielectric layer having a thickness of from about 5 Angstroms up to about 20 A°.
Claim 13
Dependent Claim 21 words
The process of claim 10 wherein the furnace temperature is ramped up at about 5° C. per minute±1° C. per minute.
Claim 14
Dependent Claim 21 words
The process of claim 10 wherein the furnace temperature is ramped down at about 3° C. per minute±1° C. per minute.

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-09-27 2003-03-29 2003-09-28 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-09-27 2007-03-29 2007-09-28 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-09-27 2011-03-29 2011-09-28 $7700.00 Window Closed / Lapsed

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