Patent US5949117A successfully refreshed from Google Patents.
US5949117A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Highly efficient transistor for fast programming of flash memories
Assignee: Micron Technology Inc
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Filing: 1995-12-26
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Granted: 1999-09-07
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Expires: 2015-12-26
Abstract
Abstract In a semiconductor fabrication method for forming a transistor structure upon a semiconductor substrate, a nitride layer is also formed over the semiconductor substrate. A gate oxide layer is formed over a region of the semiconductor substrate. The gate oxide layer has a relatively thinner oxide region over the nitride layer and a relatively thicker oxide region over the substrate adjacent the nitride layer. A transistor gate is formed extending over the relatively thinner oxide region and over the relatively thicker oxide region. The transistor thus formed is therefore asymmetric. A first transistor active region is formed in the vicinity of the relatively thicker oxide region and a second transistor active region is formed in the vicinity of the relatively thinner oxide region. The nitride layer can be formed by rapid thermal nitridization of the semiconductor substrate. The relatively thinner oxide region can be one-half as thick as the relatively thinner oxide region. The surface of the semiconductor substrate can be curved in the vicinity of the drain of the asymmetric transistor in order to permit the momentum of the charge carriers to facilitate penetration of the charge carriers into the gate.
Inventors
- 👤 Gurtej Singh Sandhu
- 👤 Pierre Fazan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 04:13
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/68; H10D30/681; H10D30/684; H10D30/685; H10D30/6891
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
91 words
A semiconductor integrated circuit formed upon a semiconductor substrate, comprising: a nitride layer disposed over said semiconductor substrate, said nitride layer has a thickness of approximately thirty angstroms; a gate oxide layer formed over said semiconductor substrate, said gate oxide layer having a relatively thinner oxide region disposed over the area of said nitride layer and a relatively thicker oxide region disposed adjacent said nitride layer; a first transistor active region disposed adjacent said relatively thicker oxide region; and a second transistor active region disposed adjacent said relatively thinner oxide region.
Claim 2
Dependent Claim
91 words
A semiconductor integrated circuit formed upon a semiconductor substrate, comprising: a nitride layer disposed over said semiconductor substrate, said nitride layer has a thickness of approximately thirty angstroms; a gate oxide layer formed over said semiconductor substrate, said gate oxide layer having a relatively thinner oxide region disposed over the area of said nitride layer and a relatively thicker oxide region disposed adjacent said nitride layer; a first transistor active region disposed adjacent said relatively thicker oxide region; and a second transistor active region disposed adjacent said relatively thinner oxide region.
Claim 3
Dependent Claim
108 words
A semiconductor integrated circuit formed upon a semiconductor substrate, comprising: a nitride layer disposed over said semiconductor substrate, said nitride layer is disposed in the vicinity of a sloped surface of said semiconductor substrate; a gate oxide layer formed over said semiconductor substrate, said gate oxide layer having a relatively thinner oxide region disposed over the area of said nitride layer and a relatively thicker oxide region disposed adjacent said nitride layer, said relatively thicker oxide region is disposed over said sloped substrate; a first transistor active region disposed adjacent said relatively thicker oxide region; and a second transistor active region disposed adjacent said relatively thinner oxide region.
Claim 4
Dependent Claim
108 words
A semiconductor integrated circuit formed upon a semiconductor substrate, comprising: a nitride layer disposed over said semiconductor substrate, said nitride layer is disposed in the vicinity of a sloped surface of said semiconductor substrate; a gate oxide layer formed over said semiconductor substrate, said gate oxide layer having a relatively thinner oxide region disposed over the area of said nitride layer and a relatively thicker oxide region disposed adjacent said nitride layer, said relatively thicker oxide region is disposed over said sloped substrate; a first transistor active region disposed adjacent said relatively thicker oxide region; and a second transistor active region disposed adjacent said relatively thinner oxide region.
Claim 5
Dependent Claim
100 words
A semiconductor integrated circuit formed upon a semiconductor substrate, comprising: a nitride layer disposed over said semiconductor substrate; a gate oxide layer formed over said semiconductor substrate, said gate oxide layer having a relatively thinner oxide region disposed over the area of said nitride layer and a relatively thicker oxide region disposed adjacent said nitride layer, wherein said relatively thicker oxide region has a thickness of between approximately fifty angstroms and approximately one hundred-fifty angstroms; a first transistor active region disposed adjacent said relatively thicker oxide region; and a second transistor active region disposed adjacent said relatively thinner oxide region.
Claim 6
Dependent Claim
100 words
A semiconductor integrated circuit formed upon a semiconductor substrate, comprising: a nitride layer disposed over said semiconductor substrate; a gate oxide layer formed over said semiconductor substrate, said gate oxide layer having a relatively thinner oxide region disposed over the area of said nitride layer and a relatively thicker oxide region disposed adjacent said nitride layer, wherein said relatively thicker oxide region has a thickness of between approximately fifty angstroms and approximately one hundred-fifty angstroms; a first transistor active region disposed adjacent said relatively thicker oxide region; and a second transistor active region disposed adjacent said relatively thinner oxide region.
Claim 7
Dependent Claim
109 words
A semiconductor integrated circuit formed upon a semiconductor substrate, comprising: a nitride layer disposed over said semiconductor substrate, said nitride layer is disposed in the vicinity of a sloped surface of said semiconductor substrate; a gate oxide layer formed over said semiconductor substrate, said gate oxide layer having a relatively thinner oxide region disposed over the area of said nitride layer and a relatively thicker oxide region disposed adjacent said nitride layer, wherein said relatively thicker oxide region is self-aligned with said sloped surface; a first transistor active region disposed adjacent said relatively thicker oxide region; and a second transistor active region disposed adjacent said relatively thinner oxide region.
Claim 8
Dependent Claim
109 words
A semiconductor integrated circuit formed upon a semiconductor substrate, comprising: a nitride layer disposed over said semiconductor substrate, said nitride layer is disposed in the vicinity of a sloped surface of said semiconductor substrate; a gate oxide layer formed over said semiconductor substrate, said gate oxide layer having a relatively thinner oxide region disposed over the area of said nitride layer and a relatively thicker oxide region disposed adjacent said nitride layer, wherein said relatively thicker oxide region is self-aligned with said sloped surface; a first transistor active region disposed adjacent said relatively thicker oxide region; and a second transistor active region disposed adjacent said relatively thinner oxide region.
Claim 9
Dependent Claim
24 words
The semiconductor integrated circuit of claim 1, wherein said nitride layer is disposed in the vicinity of a sloped surface of said semiconductor substrate.
Claim 10
Dependent Claim
19 words
The semiconductor integrated circuit of claim 5, wherein said relatively thicker oxide region is disposed over said sloped substrate.
Claim 11
Dependent Claim
26 words
The semiconductor integrated circuit of claim 1, wherein said relatively thicker oxide region has a thickness of between approximately fifty angstroms and approximately one hundred-fifty angstroms.
Claim 12
Dependent Claim
21 words
The semiconductor integrated circuit of claim 3, wherein said relatively thicker oxide region has a thickness of approximately one hundred angstroms.
Claim 13
Dependent Claim
17 words
The semiconductor integrated circuit of claim 1, wherein said first transistor active region comprises a transistor drain.
Claim 14
Dependent Claim
17 words
The semiconductor integrated circuit of claim 9, wherein said second transistor active region comprises a transistor source.
Claim 15
Dependent Claim
15 words
The semiconductor integrated circuit of claim 10, further comprising a contact adjacent said transistor drain.
Claim 16
Dependent Claim
37 words
The semiconductor integrated circuit of claim 11, further comprising an insulating layer disposed over said semiconductor substrate, said insulating layer having an opening for said contact to extend therethrough and make electrical contact with said transistor drain.
Claim 17
Dependent Claim
24 words
The semiconductor integrated circuit of claim 1, wherein said relatively thinner gate oxide region includes a single oxide layer disposed over said nitride layer.
Claim 18
Dependent Claim
24 words
The semiconductor integrated circuit of claim 1, wherein said relatively thinner gate oxide region includes oxide layers disposed over and below said nitride layer.
Claim 19
Dependent Claim
19 words
The semiconductor integrated circuit of claim 1, wherein said relatively thinner gate oxide region includes a layer of oxynitride.
Claim 20
Dependent Claim
19 words
The semiconductor integrated circuit of claim 5, wherein said relatively thicker oxide region is self-aligned with said sloped surface.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 2002-09-06 | 2003-03-08 | 2003-09-07 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-09-06 | 2007-03-08 | 2007-09-07 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-09-06 | 2011-03-08 | 2011-09-07 | $7700.00 | Window Closed / Lapsed |