US5909054A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Semiconductor device having a multiple-terminal integrated circuit formed on a circuit substrate
Assignee: Toshiba Corp
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Filing: 1997-10-31
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Granted: 1999-06-01
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Expires: 2017-10-31
Abstract
Abstract A semiconductor device comprises a multiple-terminal integrated circuit formed on a substrate. The integrated circuit is formed on the upper surface of the substrate and electrically connected to a plurality of external terminals arranged on an under surface of the substrate. Part of a sealing member is embedded in a plurality of through-holes. The through holes are provided in the substrate to be in the vicinity of the plurality of external terminals. The sealing member seals the upper surface of the substrate, with the integrated circuit formed thereon.
Inventors
- 👤 Hiroyuki Kozono
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 08:17
CPC Classifications
H; H10; H10W; H10W70/00; H10W70/60; H10W70/67; H10W70/68; H10W74/00; H10W74/10; H10W74/111; H10W74/114; H10W70/681; H10W72/00; H10W72/50; H10W72/541; H10W72/5449; H10W72/551; H10W72/552; H10W72/851; H10W72/874; H10W72/884; H10W72/90; H10W72/931; H10W72/932; H10W90/00; H10W90/701; H10W90/721; H10W90/724; H10W90/731; H10W90/734; H10W90/751; H10W90/754
Claims Analysis
Total Claims: 7
Claim 1
Independent Claim
132 words
A semiconductor device having multiple-terminal integrated circuit formed on a substrate, comprising: a substrate having a plurality of non-electrically conductive through holes; an integrated circuit provided on an upper surface of said substrate; a plurality of external terminals to which said integrated circuit is electrically connected and which are arranged on an under surface of said substrate; and a sealing member, provided near the external terminals, sealing the upper surface of the substrate and having a part embedded in said through holes, the sealing member being higher in heat conduction than the substrate to thereby conduct a portion of the heat of the sealing member to the substrate from the part of the sealing member embedded in the through holes and lessen a temperature difference between the substrate and the sealing member.
Claim 2
Dependent Claim
132 words
A semiconductor device having multiple-terminal integrated circuit formed on a substrate, comprising: a substrate having a plurality of non-electrically conductive through holes; an integrated circuit provided on an upper surface of said substrate; a plurality of external terminals to which said integrated circuit is electrically connected and which are arranged on an under surface of said substrate; and a sealing member, provided near the external terminals, sealing the upper surface of the substrate and having a part embedded in said through holes, the sealing member being higher in heat conduction than the substrate to thereby conduct a portion of the heat of the sealing member to the substrate from the part of the sealing member embedded in the through holes and lessen a temperature difference between the substrate and the sealing member.
Claim 3
Dependent Claim
15 words
A semiconductor device according to claim 1, wherein said substrate is a glass epoxy substrate.
Claim 4
Dependent Claim
25 words
A semiconductor device according to claim 1, wherein said plurality of external terminals are arranged on a periphery of the upper surface of said substrate.
Claim 5
Dependent Claim
54 words
A semiconductor device according to claim 1, wherein said plurality of through holes in which part of said sealing member is embedded, are arranged to be inside said plurality of external terminals provided on an outer periphery of the upper surface of said substrate, and to be surrounded by the plurality of external terminals.
Claim 6
Dependent Claim
39 words
A semiconductor device according to claim 1, wherein said plurality of through holes in which part of said sealing member is embedded, are arranged more densely at a periphery of said substrate than a center portion of said substrate.
Claim 7
Dependent Claim
14 words
A semiconductor device according to claim 1, wherein said external terminals are bump-shaped terminals.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-05-31 | 2002-11-30 | 2003-06-01 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-05-31 | 2006-11-30 | 2007-06-01 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-05-31 | 2010-11-30 | 2011-06-01 | $7700.00 | Window Closed / Lapsed |