Trench isolation for CMOS devices

Claim 1

A method of fabricating an isolation region in an integrated circuit, the method comprising: forming a first layer of nitride on a base layer of the integrated circuit; patterning an area of the base layer to define an outline of the isolation region; forming a shallow trench in the patterned area of the base layer; forming a second layer of nitride on the first layer of nitride and the shallow trench; forming a first layer of oxide on the second layer of nitride; removing some of the first layer of oxide to define an opening in the first layer of oxide at a bottom of the shallow trench; forming a deep trench in the opening in the first layer of oxide positioned in self alignment with the shallow trench; forming a second layer of oxide over the second layer of nitride, the shallow trench and the deep trench; removing the second layer of oxide from within the shallow trench, while leaving the second layer of oxide in the deep trench; removing the second layer of nitride from a bottom surface of the shallow trench; forming polysilicon in the shallow trench; oxidizing the polysilicon; and annealing the oxidized polysilicon.

Claim 2

A method of fabricating an isolation region in an integrated circuit, the method comprising: forming a first layer of nitride on a base layer of the integrated circuit; patterning an area of the base layer to define an outline of the isolation region; forming a shallow trench in the patterned area of the base layer; forming a second layer of nitride on the first layer of nitride and the shallow trench; forming a first layer of oxide on the second layer of nitride; removing some of the first layer of oxide to define an opening in the first layer of oxide at a bottom of the shallow trench; forming a deep trench in the opening in the first layer of oxide positioned in self alignment with the shallow trench; forming a second layer of oxide over the second layer of nitride, the shallow trench and the deep trench; removing the second layer of oxide from within the shallow trench, while leaving the second layer of oxide in the deep trench; removing the second layer of nitride from a bottom surface of the shallow trench; forming polysilicon in the shallow trench; oxidizing the polysilicon; and annealing the oxidized polysilicon.

Claim 4

A method of fabricating an isolation region in an integrated circuit, the method comprising: providing a base layer having a top surface; etching the base layer to form a first trench having a width W1, the first trench having a bottom surface X distance below a top surface of the base layer; providing a layer of nitride on top of the base layer and covering the side walls and bottom of the first trench; providing a first layer of oxide on top of the layer of nitride to fill the first trench to a level substantially equal to the top surface of the base layer; removing a portion of the first layer of oxide and the layer of nitride to define an opening at a central region of the bottom surface of the first trench; etching the base layer to form a second trench located at the opening and having a width W2 which is less than width W1, the second trench having a bottom surface Y distance below the bottom surface of the first trench; providing a second layer of oxide to fill the first and second trenches to a level substantially equal to the top surface of the base layer; removing a portion of the second layer of oxide such that the second trench remains full of oxide, and a portion of the nitride remains attached to side walls of the first trench; providing a semiconductor material in the first trench; and converting the semiconductor material to an insulator material.

Claim 5

A method of fabricating an isolation region in an integrated circuit, the method comprising: providing a base layer having a top surface; etching the base layer to form a first trench having a width W1, the first trench having a bottom surface X distance below a top surface of the base layer; providing a layer of nitride on top of the base layer and covering the side walls and bottom of the first trench; providing a first layer of oxide on top of the layer of nitride to fill the first trench to a level substantially equal to the top surface of the base layer; removing a portion of the first layer of oxide and the layer of nitride to define an opening at a central region of the bottom surface of the first trench; etching the base layer to form a second trench located at the opening and having a width W2 which is less than width W1, the second trench having a bottom surface Y distance below the bottom surface of the first trench; providing a second layer of oxide to fill the first and second trenches to a level substantially equal to the top surface of the base layer; removing a portion of the second layer of oxide such that the second trench remains full of oxide, and a portion of the nitride remains attached to side walls of the first trench; providing a semiconductor material in the first trench; and converting the semiconductor material to an insulator material.