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US5889694A Expired / Lapsed US ⏱️ 0.0 years remaining

Dual-addressed rectifier storage device

Assignee: HGST Inc
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Filing: 1997-05-27
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Granted: 1999-03-30
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Expires: 2017-05-27
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Abstract

Abstract A read-only data storage and retrieval device is presented having no moving parts and requiring very low power. Addressing can be accomplished sequentially where the address increments automatically or can be accomplished randomly. High density storage is achieved through the use of a highly symmetric diode matrix that is addressed in both coordinate directions; its symmetry makes the Dual-addressed Rectifier Storage (DRS) Array very scaleable, particularly when made as an integrated circuit. For even greater storage flexibility, multiple digital rectifier storage arrays can be incorporated into the device, one or more of which can be made removable and interchangeable.

Inventors

  • 👤 Daniel R. Shepard

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 20:43
CPC Classifications
G; G11; G11C; G11C8/00; G11C8/04; G11C17/00; G11C17/06; G11C17/08; G11C17/10; H; H10; H10B; H10B20/00

Claims Analysis

Total Claims: 35
Claim 1
Independent Claim 292 words
A digital logic device comprising one or more electronic information storage means, and addressing means for accessing said storage means, wherein each said electronic information storage means comprises: a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means; a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means with each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection; means for selecting a conductive means of one plurality of generally parallel conductive means, and means for biasing the generally parallel conductive means of the other plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means to a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled; and wherein said addressing means comprises: means for controlling said means for electronically selecting conductive means of one said plurality of generally parallel conductive means and for electronically selecting conductive means of the other said plurality of generally parallel conductive means.
Claim 2
Dependent Claim 292 words
A digital logic device comprising one or more electronic information storage means, and addressing means for accessing said storage means, wherein each said electronic information storage means comprises: a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means; a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means with each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection; means for selecting a conductive means of one plurality of generally parallel conductive means, and means for biasing the generally parallel conductive means of the other plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means to a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled; and wherein said addressing means comprises: means for controlling said means for electronically selecting conductive means of one said plurality of generally parallel conductive means and for electronically selecting conductive means of the other said plurality of generally parallel conductive means.
Claim 3
Dependent Claim 117 words
The digital logic device of claim 1, wherein said means for selecting a conductive means of one plurality of generally parallel conductive means comprises: means for biasing the generally parallel conductive means of the said one plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means and a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled.
Claim 4
Dependent Claim 27 words
The digital logic device of claim 1, further comprising means for detecting a conducted current through said rectifying conductive means if present at said point of intersection.
Claim 5
Dependent Claim 29 words
The digital logic device of claim 1, wherein one of said plurality of generally parallel conductive means is a plurality of generally parallel doped regions within a semiconductor material.
Claim 6
Dependent Claim 26 words
The digital logic device of claim 4, wherein the other of said plurality of generally parallel conductive means is a plurality of generally parallel metalized regions.
Claim 7
Dependent Claim 18 words
The digital logic device of claim 1, wherein said addressing means comprises means to sequentially select addressed locations.
Claim 8
Dependent Claim 18 words
The digital logic device of claim 1, wherein said addressing means comprises means to randomly select addressed locations.
Claim 9
Dependent Claim 20 words
The digital logic device of claim 1, further comprising display means for displaying alphanumeric or graphic information to its user.
Claim 10
Dependent Claim 19 words
The digital logic device of claim 1, further comprising input means to enable its user to alter its operation.
Claim 11
Dependent Claim 22 words
The digital logic device of claim 1, wherein part or all of said one more electronic storage means are removable or replaceable.
Claim 12
Dependent Claim 17 words
The digital logic device of claim 1, wherein output from the device is in a digital format.
Claim 13
Dependent Claim 17 words
The digital logic device of claim 1, wherein output from the device is in an analog format.
Claim 14
Dependent Claim 22 words
The digital logic device of claim 1, wherein output from the device is in either a digital format or an analog format.
Claim 15
Dependent Claim 230 words
An electronic information storage device comprising: a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means; a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means and each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection; means for selecting a conductive means of one plurality of generally parallel conductive means, and means for biasing the generally parallel conductive means of the other plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means and a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled.
Claim 16
Dependent Claim 230 words
An electronic information storage device comprising: a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means; a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means and each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection; means for selecting a conductive means of one plurality of generally parallel conductive means, and means for biasing the generally parallel conductive means of the other plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means and a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled.
Claim 17
Dependent Claim 116 words
The storage device of claim 14, wherein said means for selecting a conductive means of one plurality of generally parallel conductive means comprises: means for biasing the generally parallel conductive means of the said one plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means and a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled.
Claim 18
Dependent Claim 26 words
The storage device of claim 14, further comprising means for detecting a conducted current through said rectifying conductive means if present at said point of intersection.
Claim 19
Dependent Claim 28 words
The storage device of claim 14, wherein one of said plurality of generally parallel conductive means is a plurality of generally parallel doped regions within a semiconductor material.
Claim 20
Dependent Claim 33 words
The storage device of claim 17, wherein said rectifying conductive means between said plurality of generally parallel doped regions and a plurality of generally parallel metalized regions is of the metal-on-semiconductor junction type.
Claim 21
Dependent Claim 33 words
The storage device of claim 17, wherein said rectifying conductive means between said plurality of generally parallel doped regions and a plurality of generally parallel metalized regions is of the p-n junction type.
Claim 22
Dependent Claim 24 words
The storage device of claim 14, wherein one of said plurality of generally parallel conductive means is a plurality of generally parallel metalized regions.
Claim 23
Dependent Claim 20 words
The storage device of claim 14, wherein said rectifying conductive means is comprised by a transistor as the base-emitter junction.
Claim 24
Dependent Claim 19 words
The storage device of claim 14, further comprising means for retaining the address of the information to be accessed.
Claim 25
Dependent Claim 14 words
The storage device of claim 22, further comprising means for incrementing the retained address.
Claim 26
Dependent Claim 14 words
The storage device of claim 22, further comprising means for setting the retained address.
Claim 27
Dependent Claim 261 words
An electronic information storage device comprising a plurality of storage means where each storage means comprises: a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means; a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means and each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection; means for selecting a conductive means of one plurality of generally parallel conductive means, and means for biasing the generally parallel conductive means of the other plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means and a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled; where at least one of said plurality of generally parallel conductive means is common to more than one said storage means.
Claim 28
Dependent Claim 261 words
An electronic information storage device comprising a plurality of storage means where each storage means comprises: a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means; a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means and each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection; means for selecting a conductive means of one plurality of generally parallel conductive means, and means for biasing the generally parallel conductive means of the other plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means and a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled; where at least one of said plurality of generally parallel conductive means is common to more than one said storage means.
Claim 29
Dependent Claim 116 words
The storage device of claim 25, wherein said means for selecting a conductive means of one plurality of generally parallel conductive means comprises: means for biasing the generally parallel conductive means of the said one plurality of generally parallel conductive means such that each said rectifying conductive means present between a conductive means of said biased plurality of generally parallel conductive means and a conductive means of the other said plurality of generally parallel conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of generally parallel conductive means by shifting the voltage of those biased conductive means that are to be disabled.
Claim 30
Dependent Claim 175 words
A semiconductor information storage device comprising: a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means where one of said two pluralities of generally parallel conductive means is generally a surface layer of the semiconductor; and a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means and each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection, and where any said presence or absence of a rectifying conductive means is determined by the leaving in place or the removal, respectively, of a portion of the surface layer conductive means.
Claim 31
Dependent Claim 175 words
A semiconductor information storage device comprising: a plurality of generally parallel conductive means; a second plurality of generally parallel conductive means that is generally perpendicular to and overlapping with the first said plurality of generally parallel conductive means where one of said two pluralities of generally parallel conductive means is generally a surface layer of the semiconductor; and a plurality of bits of potential information storage where a bit of said plurality of bits is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of generally parallel conductive means and each conductive means of the second said plurality of generally parallel conductive means, and where the state of any said bit is determined by the presence or absence of a rectifying conductive means at each said general vicinity of said point of intersection, and where any said presence or absence of a rectifying conductive means is determined by the leaving in place or the removal, respectively, of a portion of the surface layer conductive means.
Claim 32
Dependent Claim 161 words
An electronic array of selectable points comprising: a plurality of conductive means; a second plurality of conductive means; a plurality of selectable points where a point of said plurality of selectable points is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of conductive means and each conductive means of the second said plurality of conductive means; means for selecting a conductive means of one plurality of conductive means, and means for biasing the conductive means of the other plurality of conductive means such that each said selectable point present between a conductive means of said biased plurality of conductive means and a conductive means of the other said plurality of conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of conductive means by shifting the voltage of those biased conductive means that are to be disabled.
Claim 33
Dependent Claim 161 words
An electronic array of selectable points comprising: a plurality of conductive means; a second plurality of conductive means; a plurality of selectable points where a point of said plurality of selectable points is present in the general vicinity of each point of intersection of each conductive means of the first said plurality of conductive means and each conductive means of the second said plurality of conductive means; means for selecting a conductive means of one plurality of conductive means, and means for biasing the conductive means of the other plurality of conductive means such that each said selectable point present between a conductive means of said biased plurality of conductive means and a conductive means of the other said plurality of conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of conductive means by shifting the voltage of those biased conductive means that are to be disabled.
Claim 34
Dependent Claim 108 words
The electronic array of selectable points of claim 28, wherein said means for selecting a conductive means of one plurality of generally parallel conductive means comprises: means for biasing the conductive means of the said one plurality of conductive means such that each said selectable point present between a conductive means of said biased plurality of conductive means and a conductive means of the other said plurality of conductive means is potentially forward biased; and means for selecting a biased conductive means by electronically disabling conductive means within said biased plurality of conductive means by shifting the voltage of those biased conductive means that are to be disabled.
Claim 35
Dependent Claim 27 words
The electronic array of selectable points of claim 28, wherein said each selectable point comprises a light emitting diode (LED) which will emit light when forward biased.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2002-03-29 2002-09-28 2003-03-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2006-03-29 2006-09-28 2007-03-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2010-03-29 2010-09-28 2011-03-30 $7700.00 Window Closed / Lapsed

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