US4661927A
Expired / Lapsed
US
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Integrated Schottky logic read only memory
Assignee: Atmel Corp
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Filing: 1985-01-15
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Granted: 1987-04-28
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Expires: 2005-01-15
Abstract
Abstract An integrated Schottky logic (ISL) read only memory (ROM) uses ISL drivers and decoders connected to wordlines and data bitlines. The pattern of data stored in the ISL is determined by Schottky diodes which are connected between selected data bitlines and wordlines. Improved performance is achieved by using a leakage current compensation source (such as a wordline pullup resistor) connected to each wordline, and by using a programmable dummy load (such as one or more dummy bitlines). The pullup resistors compensate for bitline loading sensitivity caused by leakage currents of the workline drivers. The dummy bitlines are selectively connected to those wordlines which are lightly loaded to compensate for wordline loading sensitivity and thus equalize access time and improve wordline decoder noise margins.
Inventors
- 👤 Jeffrey P. Graebel
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 08:26
CPC Classifications
H; H03; H03K; H03K19/00; H03K19/02; H03K19/08; H03K19/082; H03K19/091; H03K19/0915; G; G11; G11C; G11C17/00; G11C17/06; H03K17/00; H03K17/51; H03K17/56; H03K17/60; H03K17/62; H03K17/6285; H03K5/00; H03K5/01; H03K5/02
Claims Analysis
Total Claims: 25
Claim 1
Independent Claim
98 words
A read-only memory (ROM) device comprising: a plurality of wordlines; a plurality of data bitlines; diodes selectively connected between wordlines and data bitlines to represent a predetermined data pattern based upon presence and absence of a diode connected between each wordline and data bitline; wordline driver means for addressing a selected wordline; output means for deriving output signals representative of the data pattern based upon signals received from the data bitlines as the selected wordline is addressed; and pattern sensitivity compensation means connected to the wordlines for compensating for variations of loading due to the predetermined data pattern.
Claim 2
Dependent Claim
98 words
A read-only memory (ROM) device comprising: a plurality of wordlines; a plurality of data bitlines; diodes selectively connected between wordlines and data bitlines to represent a predetermined data pattern based upon presence and absence of a diode connected between each wordline and data bitline; wordline driver means for addressing a selected wordline; output means for deriving output signals representative of the data pattern based upon signals received from the data bitlines as the selected wordline is addressed; and pattern sensitivity compensation means connected to the wordlines for compensating for variations of loading due to the predetermined data pattern.
Claim 3
Dependent Claim
33 words
The ROM device of claim 1 wherein the pattern sensitivity compensation means comprises: leakage current compensation means for supplying current to the wordlines to compensate for leakage currents of the wordline driver means.
Claim 4
Dependent Claim
20 words
The ROM device of claim 2 wherein the leakage current compensation means comprises a wordline pullup connected to each wordline.
Claim 5
Dependent Claim
28 words
The ROM device of claim 1 wherein the pattern sensitivity compensation means comprises: dummy load means selectively connected to the wordlines for compensation for variations in wordline loading.
Claim 6
Dependent Claim
55 words
The ROM device of claim 4 wherein the dummy load means comprises: a dummy bitline; and diodes connected between the dummy bitline and selected wordlines, where presence of a diode between a particular wordline and the dummy bitline is a function of the number of diodes connected between that particular wordline and the data bitlines.
Claim 7
Dependent Claim
43 words
The ROM device of claim 4 wherein the dummy load means comprises: a plurality of dummy bitlines; a current source connected to each dummy bitline; and diodes selectively connecting the wordlines and the dummy bitlines as a function of the predetermined data pattern.
Claim 8
Dependent Claim
22 words
The ROM device of claim 1 wherein the pattern sensitivity compensation means compensates for heavy loading of diodes on the data bitlines.
Claim 9
Dependent Claim
21 words
The ROM device of claim 1 wherein the pattern sensitivity compensation means compensates for light loading of diodes on the wordlines.
Claim 10
Dependent Claim
20 words
The ROM device of claim 1 wherein the wordline driver means includes wordline driver connected to each of the wordlines.
Claim 11
Dependent Claim
21 words
The ROM device of claim 9 wherein the output means includes a sense amp connected to each of the data bitlines.
Claim 12
Dependent Claim
36 words
The ROM device of claim 10 wherein the selected wordline is addressed by the wordline driver connected to the selected wordline being turned on and the wordline drivers connected to all other wordlines being turned off.
Claim 13
Dependent Claim
44 words
The ROM device of claim 11 wherein the pattern sensitivity compensation means includes a current source connected to each wordline to provide a compensation current to each wordline which is not addressed which compensates for leakage currents of the wordline drivers while turned off.
Claim 14
Dependent Claim
19 words
The ROM device of claim 11 wherein the pattern sensitivity compensation means provides supplemental current to lightly loaded wordlines.
Claim 15
Dependent Claim
49 words
The ROM device of claim 1 wherein the pattern sensitivity compensation means comprises: leakage current compensation means for supplying current to the wordlines to compensate for leakage currents of the wordline driver means; and dummy load means selectively connected to the wordlines for compensation for variations in wordline loading.
Claim 16
Dependent Claim
20 words
The ROM device of claim 14 wherein the leakage current compensation means comprises a wordline pullup connected to each wordline.
Claim 17
Dependent Claim
55 words
The ROM device of claim 15 wherein the dummy load means comprises: a dummy bitline; and diodes connected between the dummy bitline and selected wordlines, where presence of a diode between a particular wordline and the dummy bitline is a function of the number of diodes connected between that particular wordline and the data bitlines.
Claim 18
Dependent Claim
43 words
The ROM device of claim 15 wherein the dummy load means comprises: a plurality of dummy bitlines; a current source connected to each dummy bitline; and diodes selectively connecting the wordlines and the dummy bitlines as a function of the predetermined data pattern.
Claim 19
Dependent Claim
97 words
An integrated Schottky logic (ISL) read only memory (ROM) device comprising: a plurality of wordlines; a plurality of data bitlines; a current source connected to each data bitline; a wordline driver connected to each wordline; a sense amp connected to each data bitline; an array of Schottky diodes connected between wordlines and data bitlines to represent a predtermined data pattern based upon presence and absence of a Schottky diode connected between each wordline and data bitline; and pattern sensitivity compensation means connected to the wordlines for compensating for variation of loading due to the predetermined data pattern.
Claim 20
Dependent Claim
97 words
An integrated Schottky logic (ISL) read only memory (ROM) device comprising: a plurality of wordlines; a plurality of data bitlines; a current source connected to each data bitline; a wordline driver connected to each wordline; a sense amp connected to each data bitline; an array of Schottky diodes connected between wordlines and data bitlines to represent a predtermined data pattern based upon presence and absence of a Schottky diode connected between each wordline and data bitline; and pattern sensitivity compensation means connected to the wordlines for compensating for variation of loading due to the predetermined data pattern.
Claim 21
Dependent Claim
29 words
The ISL ROM of claim 18 wherein the pattern sensitivity compensation means comprises: a current source connected to each of the wordlines to compensate for variations in bitline loading.
Claim 22
Dependent Claim
28 words
The ISL ROM of claim 18 wherein the pattern sensitivity compensation means comprises: a dummy load selectively connected to the wordlines for compensation for variations in wordline loading.
Claim 23
Dependent Claim
42 words
The ISL ROM of claim 20 wherein the dummy load comprises a plurality of dummy bitlines; a current source connected to each dummy bitline; and diodes selectively connecting the wordlines and the dummy bitlines as a function of the predetermined data pattern.
Claim 24
Dependent Claim
45 words
The ISL ROM of claim 18 wherein the pattern sensitivity compensation means comprises: a current source connected to each of the wordlines to compensate for variations in bitline loading; and a dummy load selectively connected to the wordlines for compensation for variations in wordline loading.
Claim 25
Dependent Claim
42 words
The ISL ROM of claim 22 wherein the dummy load comprises a purality of dummy bitlines; a current source connected to each dummy bitline; and diodes selectively connecting the wordlines and the dummy bitlines as a function of the predetermined data pattern.
References Cited (Backward Citations)
US4608672A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1990-04-27 | 1990-10-27 | 1991-04-28 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1994-04-27 | 1994-10-27 | 1995-04-28 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 1998-04-27 | 1998-10-27 | 1999-04-28 | $7700.00 | Window Closed / Lapsed |