Patent US5867640A successfully refreshed from Google Patents.
US5867640A
Expired / Lapsed
US
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Apparatus and method for improving write-throughput in a redundant array of mass storage devices
Assignee: EMC Corp
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Filing: 1997-08-21
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Granted: 1999-02-02
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Expires: 2017-08-21
Abstract
Abstract A method and apparatus are provided for improving write throughput in a redundant array of mass storage devices using a cache memory to store redundant terms or code words generated when data is written to one or more devices in the array. The cache memory improves the write-throughput performance of the array by eliminating the need to perform a read-modify-write operation on check data stored in the mass storage devices of the array each time a write request is made. As a result, write-throughput of the system, particularly at peak demand periods, is improved.
Inventors
- 👤 Gale Ramon Aguilar
- 👤 Thomas E. Idelman
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 03:38
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/07; G06F11/08; G06F11/10; G06F11/1076; G06F2211/00; G06F2211/10; G06F2211/1002; G06F2211/1009
Claims Analysis
Total Claims: 18
Claim 1
Independent Claim
169 words
A system for storing data in a redundant array of mass storage devices, comprising: a plurality of mass storage devices; a controller coupled to the plurality of mass storage devices, said controller providing a set of controlled data paths between an external data source and said plurality of mass storage devices; an error detection circuit coupled to said set of controlled data paths, wherein said error detection circuit calculates at least one error detection term based on a group of data terms which are received by said controller from said external data source and which said controller distributes among multiple ones of said plurality of mass storage devices for storage via said set of controlled data paths; and a cache memory coupled to said error detection circuit in which said at least one error detection term is stored; wherein said controller is configured to retrieve said error detection term from said cache memory, and retrieve said group of data terms from said mass storage devices, for a read-modify-write operation.
Claim 2
Independent Claim
169 words
A system for storing data in a redundant array of mass storage devices, comprising: a plurality of mass storage devices; a controller coupled to the plurality of mass storage devices, said controller providing a set of controlled data paths between an external data source and said plurality of mass storage devices; an error detection circuit coupled to said set of controlled data paths, wherein said error detection circuit calculates at least one error detection term based on a group of data terms which are received by said controller from said external data source and which said controller distributes among multiple ones of said plurality of mass storage devices for storage via said set of controlled data paths; and a cache memory coupled to said error detection circuit in which said at least one error detection term is stored; wherein said controller is configured to retrieve said error detection term from said cache memory, and retrieve said group of data terms from said mass storage devices, for a read-modify-write operation.
Claim 3
Dependent Claim
23 words
The system of claim 1, wherein: said cache memory is coupled to said error detection circuit via an interface port of said controller.
Claim 4
Dependent Claim
30 words
The system of claim 2, wherein the cache memory is coupled to the interface port by a bus shared by at least one of the plurality of mass storage devices.
Claim 5
Dependent Claim
18 words
The system of claim 3, wherein the cache memory shares the bus with a spare mass storage device.
Claim 6
Dependent Claim
14 words
The system of claim 2, wherein the interface port is a dedicated memory port.
Claim 7
Dependent Claim
31 words
The system of claim 1, wherein the set of controlled data paths comprise a plurality of switches that interconnect the controlled data paths, said error detection circuit, and said cache memory.
Claim 8
Dependent Claim
21 words
The system of claim 1, wherein said cache memory circuit is directly connected to said error detection circuit by a bus.
Claim 9
Dependent Claim
23 words
The system of claim 1 wherein said cache memory is connected to said controller independently of a bus to an external host computer.
Claim 10
Dependent Claim
57 words
The system of claim 1 wherein: said controller comprises first and second controller devices each coupled to the plurality of mass storage devices; said error detection circuit comprises first and second error detection circuits in each of said first and second controller devices; and said cache memory is coupled to the first and second error detection circuits.
Claim 11
Dependent Claim
28 words
The system of claim 9, wherein said cache memory is coupled to the error detection circuits in the first and second controllers by first and second buses, respectively.
Claim 12
Dependent Claim
33 words
The system of claim 10, further comprising switching means connected between said cache memory and said first and second buses for selectively coupling said cache memory to either said first or second bus.
Claim 13
Independent Claim
201 words
A system for storing data in a redundant array of mass storage devices, comprising: a plurality of mass storage means; control means coupled to the plurality of mass storage means for providing control of data flow between said plurality of mass storage means and an external data source; error detection means coupled to said control means and said plurality of mass storage means for calculating at least one error detection term based on a group of data terms which are received by said control means from said external data source and which said control means distributes among multiple ones of said plurality of mass storage means for storage; and memory means coupled to said error detection means for caching said at least one error detection term, said cached at least one error detection term being accessed from said memory means for transfer to said error detection means when new data for any of said group of data terms is received by said control means from said external data source; wherein said control means is configured to retrieve said error detection term from said memory means, and retrieve said group of data terms from said mass storage means, for a read-modify-write operation.
Claim 14
Independent Claim
201 words
A system for storing data in a redundant array of mass storage devices, comprising: a plurality of mass storage means; control means coupled to the plurality of mass storage means for providing control of data flow between said plurality of mass storage means and an external data source; error detection means coupled to said control means and said plurality of mass storage means for calculating at least one error detection term based on a group of data terms which are received by said control means from said external data source and which said control means distributes among multiple ones of said plurality of mass storage means for storage; and memory means coupled to said error detection means for caching said at least one error detection term, said cached at least one error detection term being accessed from said memory means for transfer to said error detection means when new data for any of said group of data terms is received by said control means from said external data source; wherein said control means is configured to retrieve said error detection term from said memory means, and retrieve said group of data terms from said mass storage means, for a read-modify-write operation.
Claim 15
Dependent Claim
14 words
The system of claim 12, wherein said cache memory means comprises multiple cache memories.
Claim 16
Independent Claim
124 words
A method for storing data in a redundant array of mass storage devices, comprising: receiving a group of data terms from an external source; calculating at least one error detection term based on said group of data terms; distributing said group of data terms among multiple ones of an array of mass storage devices for storage therein; storing said at least one error detection term in a cache memory; and accessing said at least one error detection term from said cache memory, if it is still present, when new data for any of said group of data terms is received to calculate at least one new error detection term for said group of data terms, while accessing data terms from said mass storage devices.
Claim 17
Independent Claim
124 words
A method for storing data in a redundant array of mass storage devices, comprising: receiving a group of data terms from an external source; calculating at least one error detection term based on said group of data terms; distributing said group of data terms among multiple ones of an array of mass storage devices for storage therein; storing said at least one error detection term in a cache memory; and accessing said at least one error detection term from said cache memory, if it is still present, when new data for any of said group of data terms is received to calculate at least one new error detection term for said group of data terms, while accessing data terms from said mass storage devices.
Claim 18
Dependent Claim
19 words
The method of claim 14, further comprising the step of storing said new redundancy term in said cache memory.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2002-02-01 | 2002-08-03 | 2003-02-02 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2006-02-01 | 2006-08-03 | 2007-02-02 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2010-02-01 | 2010-08-03 | 2011-02-02 | $7700.00 | Window Closed / Lapsed |