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US5841184A Expired / Lapsed US ⏱️ 0.0 years remaining

Integrated emitter drain bypass capacitor for microwave/RF power device applications

Assignee: MACOM Technology Solutions Holdings Inc
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Filing: 1997-09-19
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Granted: 1998-11-24
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Expires: 2017-09-19
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Abstract

Abstract A silicon bipolar junction transistor in integrated form is disclosed having a ballast resistance integrated onto a silicon chip. This resistance is for the purpose of thermal stability. In addition, a bypass capacitance circuit is placed in parallel with the ballast resistance again in integrated form. The silicon BJT is flip-chip mounted on a heterolithic microwave integrated circuit glass substrate having the integrated bypass capacitor circuit fabricated directly thereon. This bypass capacitor circuit is electrically in contact with the emitter fingers of the bipolar junction transistor.

Inventors

  • 👤 Ping Li

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-07 03:10
CPC Classifications
H; H10; H10D; H10D88/00; H10W; H10W44/00; H10W44/20; H10W44/401; H10W44/601

Claims Analysis

Total Claims: 13
Claim 1
Independent Claim 48 words
A bipolar junction transistor mounted on a HMIC substrate having a silicon pedestal electrically connected to ground, said bipolar junction transistor having a first emitter contact and a ballasting resistance connected thereto; and a second emitter contact connected to a bypass capacitance circuit disposed on said HMIC substrate.
Claim 2
Dependent Claim 48 words
A bipolar junction transistor mounted on a HMIC substrate having a silicon pedestal electrically connected to ground, said bipolar junction transistor having a first emitter contact and a ballasting resistance connected thereto; and a second emitter contact connected to a bypass capacitance circuit disposed on said HMIC substrate.
Claim 3
Dependent Claim 40 words
A bipolar junction transistor as recited in claim 1 wherein said bypass circuit has a first metal layer, a second metal layer and a dielectric layer therebetween, said first metal layer disposed on said silicon pedestal and electrically connected thereto.
Claim 4
Dependent Claim 58 words
A bipolar junction transistor as recited in claim 1, wherein said bypass capacitance circuit has a bottom metal layer, a middle metal layer and a top metal layer, with a first dielectric layer between said bottom metal layer and said middle metal layer and a second dielectric layer between said middle metal layer and said top metal layer.
Claim 5
Dependent Claim 22 words
A bipolar junction transistor as recited in claim 3 wherein said bypass capacitance circuit further comprises two capacitors connected electrically in parallel.
Claim 6
Dependent Claim 21 words
A bipolar junction transistor as recited in claim 1 wherein said capacitance circuit is connected electrically in parallel to said resistance.
Claim 7
Dependent Claim 53 words
A transistor having a base, an emitter and a collector, said emitter having first and second emitter contacts; said first emitter contact connected to a resistor and said second emitter contact connected to a bypass capacitor circuit; and said transistor and said bypass circuit mounted on a heterolithic microwave integrated circuit (HMIC) substrate.
Claim 8
Dependent Claim 53 words
A transistor having a base, an emitter and a collector, said emitter having first and second emitter contacts; said first emitter contact connected to a resistor and said second emitter contact connected to a bypass capacitor circuit; and said transistor and said bypass circuit mounted on a heterolithic microwave integrated circuit (HMIC) substrate.
Claim 9
Dependent Claim 19 words
A transistor as recited in claim 6 wherein said transistor is flip-chip mounted said on heterolithic microwave integrated circuit.
Claim 10
Dependent Claim 45 words
A transistor as recited in claim 6 wherein said bypass capacitor circuit has a first metal layer and a second metal layer and dielectric material disposed therebetween; said circuit connected to said emitter contact at one end and connected to electrical ground at another end.
Claim 11
Dependent Claim 70 words
A transistor as recited in claim 6 wherein said bypass capacitor circuit is further comprised of two capacitors connected electrically in parallel and said capacitors are further comprised of a bottom metal layer disposed on said HMIC substrate, a top metal layer and a middle metal layer, said bottom metal layer having a first dielectric layer disposed thereon and said middle metal layer having a second dielectric layer disposed thereon.
Claim 12
Dependent Claim 67 words
A transistor having a base, an emitter and a collector, said emitter having first and second emitter contacts, said first and second emitter contacts connected electrically in parallel; said first emitter contact connected to a finite resistance and said second emitter contact connected to a bypass capacitor circuit, characterized in that: said bypass capacitor circuit is disposed on a silicon pedestal of a heterolithic microwave integrated circuit.
Claim 13
Dependent Claim 67 words
A transistor having a base, an emitter and a collector, said emitter having first and second emitter contacts, said first and second emitter contacts connected electrically in parallel; said first emitter contact connected to a finite resistance and said second emitter contact connected to a bypass capacitor circuit, characterized in that: said bypass capacitor circuit is disposed on a silicon pedestal of a heterolithic microwave integrated circuit.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-11-23 2002-05-25 2002-11-24 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-11-23 2006-05-25 2006-11-24 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-11-23 2010-05-25 2010-11-24 $7700.00 Window Closed / Lapsed

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