Recessed lightly doped drain (LDD) for higher performance MOSFET

Claim 1

A MOSFET (Metal Oxide Silicon Field Effect Transistor) device structure, comprising: field oxide regions on a surface of a semiconductor substrate; a device region between said field oxide regions; a metal silicided polysilicon gate structure on said substrate in a center of said device region; metal silicided source and drain regions in the surface of said substrate, between said metal silicided polysilicon gate structure and said field oxide regions; a trench in the substrate, between the metal silicided polysilicon gate structure and the metal silicided source and drain regions; a lightly doped source and drain region in a surface of said trench and extending under the metal silicided polysilicon gate structure, and under only a portion of a respective one of said metal silicided source and drain regions; and an insulator layer over a surface of said metal silicided source and drain regions, said metal silicided polysilicon gate structure, and said field oxide and filling said trench.