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US5382534A Expired / Lapsed US ⏱️ 0.0 years remaining

Field effect transistor with recessed buried source and drain regions

Assignee: United Microelectronics Corp
•
Filing: 1994-06-06
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Granted: 1995-01-17
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Expires: 2014-06-06
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Abstract

Abstract The invention describes recessed buried conductive regions formed in a trench in the substrate that provides a smooth surface topology, smaller devices and improved device performance. The buried regions have two conductive regions, the first on the trench sidewalls, the second on the trench bottom. In addition, two buried layers are formed between adjacent buried conductive regions: a threshold voltage layer near the substrate surface and an anti-punchthrough layer formed at approximately the same depth as the conductive regions on the trench bottoms. The first conductive region and the anti-punchthrough layer have the effect of increasing the punchthru voltage without increasing the threshold voltage. The first and second regions also lowers the resistivity of the buried regions allowing use of smaller line pitches and therefore smaller devices. Overall, the recessed conductive regions and the two buried layers allow the formation of smaller devices with improved performance.

Inventors

  • 👤 Shing-Ren Sheu
  • 👤 Kuan-Cheng Su
  • 👤 Chen-Hui Chung

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 01:10
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D62/151; H10D62/01; H10D62/021; H10D62/17; H10D62/351; H10D62/357; H10D62/364; H10D62/371

Claims Analysis

Total Claims: 32
Claim 1
Independent Claim 236 words
A method of forming improved spaced buried conductive regions in a semiconductor substrate of a background impurity with a first conductivity type, comprising the steps of: forming a first gate oxide on the substrate surface; forming a first lightly doped layer of a first conductivity type in the substrate near the surface; forming a second lightly doped layer of a first conductivity type at a greater depth than said first lightly doped layer in the substrate; forming a resist layer over the first gate oxide having a pattern of elongated spaced parallel first openings; removing the first gate oxide in the first openings; forming shallow trenches in said substrate through the first openings; obliquely ion injecting impurity ions of a second conductivity type through the first openings forming buried implanted regions in the trench sidewalls and bottoms; vertically ion injecting impurity ions of a second conductivity type through the first openings implanting additional impurity ions into the buried implanted regions on the trench bottoms; removing the thin oxide layer; annealing the implanted regions in the trench sidewalls and trench bottoms to electrically activate the impurity atoms to form buried conductive lines; oxidizing the trench surfaces forming a second gate oxide layer so that the surface of the second gate oxide layer is approximately the same height of the oxide on the adjacent substrate surface; and using conventional semiconductor fabrication techniques forming and completing a semiconductor device.
Claim 2
Independent Claim 236 words
A method of forming improved spaced buried conductive regions in a semiconductor substrate of a background impurity with a first conductivity type, comprising the steps of: forming a first gate oxide on the substrate surface; forming a first lightly doped layer of a first conductivity type in the substrate near the surface; forming a second lightly doped layer of a first conductivity type at a greater depth than said first lightly doped layer in the substrate; forming a resist layer over the first gate oxide having a pattern of elongated spaced parallel first openings; removing the first gate oxide in the first openings; forming shallow trenches in said substrate through the first openings; obliquely ion injecting impurity ions of a second conductivity type through the first openings forming buried implanted regions in the trench sidewalls and bottoms; vertically ion injecting impurity ions of a second conductivity type through the first openings implanting additional impurity ions into the buried implanted regions on the trench bottoms; removing the thin oxide layer; annealing the implanted regions in the trench sidewalls and trench bottoms to electrically activate the impurity atoms to form buried conductive lines; oxidizing the trench surfaces forming a second gate oxide layer so that the surface of the second gate oxide layer is approximately the same height of the oxide on the adjacent substrate surface; and using conventional semiconductor fabrication techniques forming and completing a semiconductor device.
Claim 3
Dependent Claim 71 words
The method of claim 1 wherein the initial steps are comprised of: forming a first oxide layer on a semiconductor substrate; forming a masking layer on a first oxide layer that is capable of masking the underlying substrate against oxidation; forming openings in the masking layer which define field oxide regions; forming a plurality of field oxide regions in the substrate in the mask openings; and removing the remaining masking layer.
Claim 4
Dependent Claim 38 words
The method of claim 2 wherein impurity ions of a first conductivity type are implanted into the substrate after the gate oxide is formed using the field oxide as an implant mask forming said first lightly doped layer.
Claim 5
Dependent Claim 30 words
The method of claim 2 wherein the impurity ions of a first conductivity type are implanted using the field oxide as an implant mask forming a second lightly doped layer.
Claim 6
Dependent Claim 20 words
The method of claim 2 wherein the field oxide has a thickness in the range of 4000 to 8000 angstroms.
Claim 7
Dependent Claim 28 words
The method of claim 1 wherein the semiconductor substrate has a P-type background impurity with an impurity concentration in the range of 1E14 to 1E15 atoms/cm 3 .
Claim 8
Independent Claim 25 words
The method of claim I wherein the masking layer is composed of silicon nitride with a thickness in the range of 1000 to 2000 angstroms.
Claim 9
Dependent Claim 21 words
The method of claim 1 wherein the first gate oxide has a thickness in the range of 200 to 400 angstroms.
Claim 10
Dependent Claim 44 words
The method of claim 1 Wherein the ion injection to form the first lightly doped layer uses BF 2 ions with a dosage in the range of 1E12 to 1E13 atoms/cm 2 and an implant energy in the range of 50 to 70 Kev.
Claim 11
Dependent Claim 48 words
The method of claim 1 wherein the ion injection to form the first lightly doped layer implants boron ions of the first conductivity type with a dosage in the range of 1E12 to 1E13 atoms/cm 2 and an implant energy in the range of 10 to 20 Kev.
Claim 12
Dependent Claim 25 words
The method of claim 1 wherein the first lightly doped layer has an impurity concentration in the range of 5E17 to 8E16 atoms/cm 3 .
Claim 13
Independent Claim 41 words
The method of claim I wherein the ion injection forming the second lightly doped layer uses boron with a dosage in the range of 1E11 to 1E13 atoms/cm 2 and an implant energy in the range of 60 to 120 Kev.
Claim 14
Dependent Claim 25 words
The method of claim 1 wherein the second lightly doped layer has an impurity concentration in the range of 1E16 to 1E18 atoms/cm 3 .
Claim 15
Dependent Claim 30 words
The method of claim 1 wherein the trenches have a depth in the range of 400 to 800 angstroms and a width in the range of 0.4 to 1 microns.
Claim 16
Dependent Claim 47 words
The method of claim 1 wherein the oblique ion injection has a dosage in the range of 1E13 to 1E14 atoms/cm 2 and an implant energy in the range of 30 to 80 Kev, and an injection angle α in the range of 7 to 45 degrees.
Claim 17
Dependent Claim 17 words
The method of claim 1 wherein the ions used in the oblique ion injection are phosphorus ions.
Claim 18
Dependent Claim 37 words
The method of claim 1 wherein the vertical ion injection uses arsenic ions with a dosage in the range of 1E15 to 1E16 atoms/cm 2 and an implant energy in the range of 60 to 100 Kev.
Claim 19
Dependent Claim 33 words
The method of claim 1, wherein the buried implanted regions on the trench sidewalls have an impurity concentration of the second conductivity type in the range of 1E18 to 1E19 atoms/cm 3 .
Claim 20
Dependent Claim 33 words
The method of claim 1, wherein the buried implanted regions on the trench bottoms have an impurity concentration of the second conductivity type in the range of 1E20 to 1E21 atoms/cm 3 .
Claim 21
Dependent Claim 17 words
The method of claim 1 wherein the semiconductor substrate is a well in a larger semiconductor substrate.
Claim 22
Independent Claim 172 words
A method of forming improved spaced buried conductive lines in a semiconductor substrate with a background impurity of a first conductivity type, comprising the steps of: forming a plurality of field oxide regions on the substrate surface; forming a first gate oxide on the substrate surface; forming a pattern of elongated spaced parallel trenches in the substrate which defined buried conductive lines; obliquely ion injecting impurity ions of a second conductivity type into the trenches forming buried implanted regions at the trench sidewalls and bottom; vertically ion injecting impurity ions of a second conductivity type into the trenches bottoms implanting additional impurity ions into the buried implanted regions in the trench bottoms; annealing the implanted regions to electrically activate the impurity atoms forming buried conductive lines; oxidizing the trench surfaces forming a second gate oxide layer so that the surface of the second gate oxide layer is approximately the same height as the adjacent oxide layer on the substrate surface; and using conventional semiconductor fabrication techniques forming and completing a semiconductor device.
Claim 23
Independent Claim 172 words
A method of forming improved spaced buried conductive lines in a semiconductor substrate with a background impurity of a first conductivity type, comprising the steps of: forming a plurality of field oxide regions on the substrate surface; forming a first gate oxide on the substrate surface; forming a pattern of elongated spaced parallel trenches in the substrate which defined buried conductive lines; obliquely ion injecting impurity ions of a second conductivity type into the trenches forming buried implanted regions at the trench sidewalls and bottom; vertically ion injecting impurity ions of a second conductivity type into the trenches bottoms implanting additional impurity ions into the buried implanted regions in the trench bottoms; annealing the implanted regions to electrically activate the impurity atoms forming buried conductive lines; oxidizing the trench surfaces forming a second gate oxide layer so that the surface of the second gate oxide layer is approximately the same height as the adjacent oxide layer on the substrate surface; and using conventional semiconductor fabrication techniques forming and completing a semiconductor device.
Claim 24
Dependent Claim 60 words
The method of claim 21 wherein subsequent to the formation of the first gate oxide the steps include: forming a first lightly doped layer of a first conductivity type in the substrate near the surface; and forming a second lightly doped layer of a first conductivity type at a greater depth than said first lightly doped layer in the substrate.
Claim 25
Dependent Claim 25 words
The method of claim 22 wherein the first lightly doped layer has an impurity concentration in the range of 5E17 to 8E16 atoms/cm 3 .
Claim 26
Dependent Claim 25 words
The method of claim 23 wherein the second lightly doped layer has an impurity concentration in the range of 1E16 to 1E18 atoms/cm 3 .
Claim 27
Dependent Claim 30 words
The method of claim 21 Wherein the trenches have a depth in the range of 400 to 800 angstroms and a width in the range of 0.4 to 1 microns.
Claim 28
Dependent Claim 50 words
The method of claim 21 wherein the oblique ion injection implants phosphorus ions with a dosage in the range of 1E13 to 1E14 atoms/cm 2 at an implant energy in the range of 30 to 80 Kev, and an injection angle α in the range of 7 to 45 degrees.
Claim 29
Dependent Claim 37 words
The method of claim 21 wherein the vertical ion injection implants arsenic ions with a dosage in the range of 1E15 to 1E16 atoms/cm 2 and an implant energy in the range of 60 to 100 Kev.
Claim 30
Dependent Claim 35 words
The method of claim 21, wherein the buried implanted region on the trench sidewalls and bottom have an impurity concentration of the second conductivity type in the range of 1E18 to 1E19 atoms/cm 3 .
Claim 31
Dependent Claim 33 words
The method of claim 21, wherein the buried implanted region on the trench bottom has an impurity concentration of the second conductivity type in the range of 1E20 to 1E21 atoms/cm 3 .
Claim 32
Dependent Claim 17 words
The method of claim 21 wherein the semiconductor substrate is a well in a larger semiconductor substrate.

References Cited (Backward Citations)

JPS60164336A Cited
US5057444A Cited
US4653177A Cited
US4849367A Cited
US5118636A Cited
US5114865A Cited
JPH0410640A Cited
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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-01-16 1998-07-18 1999-01-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-01-16 2002-07-18 2003-01-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-01-16 2006-07-18 2007-01-17 $7700.00 Window Closed / Lapsed

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