US5821620A
Expired / Lapsed
US
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Electromigration resistant metallization structures for microcircuit interconnections with RF-reactively sputtered titanium tungsten and gold
Assignee: Infineon Technologies AG
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Filing: 1996-01-24
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Granted: 1998-10-13
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Expires: 2016-01-24
Abstract
Abstract Two metallization schemes of PtSi/TiW/TiW(N)/Au (Type I) and PtSi/TiW/TiW(N)/TiW/Au (Type II) and associated process are described for microcircuit interconnections. The metallization schemes and process are capable of IC-interconnections with a metal-pitch as small as 1.5 μm, or even smaller. The metallization schemes are reliable for continuous high temperature and high current operations.
Inventors
- 👤 Sam-Hyo Hong
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 17:18
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/45; H10W20/48; H10W20/01; H10W20/031; H10W20/063; H10W20/41; H10W20/425; H10W20/44; H10W20/4403; H10W20/4432; H10W20/4435; H10W72/00; H10W72/01; H10W72/012; H10W72/01251; H10W72/01255; H10W72/019; H10W72/01951; H10W72/01953; H10W72/01955; H10W72/20; H10W72/221; H10W72/251; H10W72/252; H10W72/29; H10W72/50; H10W72/551; H10W72/552; H10W72/5522; H10W72/59; H10W72/90; H10W72/921; H10W72/923; H10W72/931; H10W72/934; H10W72/951; H10W72/952; H10W74/00; H10W74/10; H10W74/131; H10W74/137; Y; Y10; Y10S; Y10S257/00; Y10S257/915
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
103 words
A plurality of interconnections on a semiconductor device, each said interconnection comprising: an insulating layer on a silicon substrate; a contact hole in said insulating layer exposing a portion of said substrate; a PtSi layer in said contact hole on said substrate; a first TiW layer in said contact hole on said PtSi layer; a TiW(N) layer in said contact hole on said first TiW layer; a second TiW layer in said contact hole on said TiW(N) layer; and an Au layer in said contact hole on said second TiW layer; wherein the interconnections have a metal pitch of 1.5 μm or less.
Claim 2
Dependent Claim
103 words
A plurality of interconnections on a semiconductor device, each said interconnection comprising: an insulating layer on a silicon substrate; a contact hole in said insulating layer exposing a portion of said substrate; a PtSi layer in said contact hole on said substrate; a first TiW layer in said contact hole on said PtSi layer; a TiW(N) layer in said contact hole on said first TiW layer; a second TiW layer in said contact hole on said TiW(N) layer; and an Au layer in said contact hole on said second TiW layer; wherein the interconnections have a metal pitch of 1.5 μm or less.
Claim 3
Dependent Claim
32 words
An interconnection in accordance with claim 1, wherein said PtSi layer reduces contact resistance and stabilizes an interface between said substrate and said first TiW layer, which acts as a glue layer.
Claim 4
Dependent Claim
16 words
An interconnection in accordance with claim 1, wherein said first TiW layer is a pure TiW-film.
Claim 5
Dependent Claim
33 words
An interconnection in accordance with claim 1, wherein said Au layer comprises a thin film of Au and said interconnection further comprises a plated layer of Au on said thin film of Au.
Claim 6
Dependent Claim
20 words
An interconnection in accordance with claim 4, further comprising: a PESiN x passivation film on said plated layer of Au.
Claim 7
Dependent Claim
19 words
An interconnection in accordance with claim 1, wherein thickness ranges are: PtSi(0.1-0.4 kÅ)/TiW(0.2-0.5 kÅ, first)/TiW(N)(1.0-2.0 kÅ)/TiW(0.1-0.5 kÅ, second)/Au(0.3-1.0 kÅ).
Claim 8
Dependent Claim
20 words
An interconnection in accordance with claim 4, wherein thickness ranges are: PtSi(0.1-0.4 kÅ)/TiW(0.2-0.5 kÅ, first)/TiW(N)(1.0-2.0 kÅ)/TiW(0.1-0.5 kÅ, second)/Au(7-15 kÅ, plated).
Claim 9
Dependent Claim
19 words
An interconnection in accordance with claim 1, wherein said TiW(N) layer is deposited by a non-magnetron RF-reactive sputtering process.
Claim 10
Dependent Claim
108 words
An interconnection on a semiconductor device, said interconnection comprising: an insulating layer on a silicon substrate; a contact hole in said insulating layer exposing a portion of said substrate; a PtSi layer in said contact hole on said substrate; a first TiW layer in said contact hole on said PtSi layer; a TiW(N) layer in said contact hole on said first TiW layer; a second TiW layer in said contact hole on said TiW(N) layer; an Au layer in said contact hole on said second TiW layer; and a TiN layer formed in respective sidewalls of said first TiW layer, said TiW(N) layer and said second TiW layer.
Claim 11
Dependent Claim
108 words
An interconnection on a semiconductor device, said interconnection comprising: an insulating layer on a silicon substrate; a contact hole in said insulating layer exposing a portion of said substrate; a PtSi layer in said contact hole on said substrate; a first TiW layer in said contact hole on said PtSi layer; a TiW(N) layer in said contact hole on said first TiW layer; a second TiW layer in said contact hole on said TiW(N) layer; an Au layer in said contact hole on said second TiW layer; and a TiN layer formed in respective sidewalls of said first TiW layer, said TiW(N) layer and said second TiW layer.
Claim 12
Dependent Claim
19 words
An interconnection in accordance with claim 9, wherein said TiW(N) layer is deposited by a non-magnetron RF-reactive sputtering process.
Claim 13
Dependent Claim
19 words
An interconnection in accordance with claim 9, further comprising a plated layer of Au on said layer of Au.
Claim 14
Dependent Claim
20 words
An interconnection in accordance with claim 11, further comprising: a PESiN x passivation film on said plated layer of Au.
Claim 15
Dependent Claim
21 words
An interconnection in accordance with claim 11, wherein thickness ranges are: PtSi(0.1-0.4 kÅ)/TiW(0.2-0.5 kÅ, first)/TiW(N)(1.0-2.0 kÅ)/TiW(0.1-0.5 kÅ, second)/Au(0.3-1.0 kÅ)/Au(7-15 kÅ, plated).
Claim 16
Dependent Claim
20 words
An interconnection in accordance with claim 9, wherein thickness ranges are: PtSi(0.1-0.4 kÅ)/TiW(0.2-0.5 kÅ, first)/TiW(N)(1.0-2.0 kÅ)/TiW(0.1-0.5 kÅ, second)/Au(0.3-1.0 kÅ). 15.
Claim 17
Dependent Claim
111 words
An interconnection on a semiconductor device, said interconnection comprising: an insulating layer on a silicon substrate; a contact hole in said insulating layer exposing a portion of said substrate; a PtSi layer in said contact hole on said substrate; a first TiW layer in said contact hole on said PtSi layer; a TiW(N) layer in said contact hole on said first TiW layer; a second TiW layer in said contact hole on said TiW(N) layer; a first Au layer in said contact hole on said second TiW layer; and a second Au layer on said first Au layer, wherein said second Au layer is physically different from said first Au layer.
Claim 18
Dependent Claim
111 words
An interconnection on a semiconductor device, said interconnection comprising: an insulating layer on a silicon substrate; a contact hole in said insulating layer exposing a portion of said substrate; a PtSi layer in said contact hole on said substrate; a first TiW layer in said contact hole on said PtSi layer; a TiW(N) layer in said contact hole on said first TiW layer; a second TiW layer in said contact hole on said TiW(N) layer; a first Au layer in said contact hole on said second TiW layer; and a second Au layer on said first Au layer, wherein said second Au layer is physically different from said first Au layer.
Claim 19
Dependent Claim
19 words
An interconnection in accordance with claim 15, wherein said TiW(N) layer is deposited by a non-magnetron RF-reactive sputtering process.
Claim 20
Dependent Claim
22 words
An interconnection in accordance with claim 15, wherein said first Au layer is sputter deposited and said second Au layer is electroplated.
Claim 21
Dependent Claim
20 words
An interconnection in accordance with claim 17, further comprising: a PESiN x passivation film on said plated layer of Au.
Claim 22
Dependent Claim
19 words
An interconnection in accordance with claim 17, wherein thickness ranges are: PtSi(0.1-0.4 kÅ)/TiW(0.2-0.5 kÅ)/TiW(N)(1.0-2.0 kÅ)/TiW(0.1-0.5 kÅ)/Au(0.3-1.0 kÅ)/Au(7-15 kÅ, plated).
Claim 23
Dependent Claim
17 words
An interconnection in accordance with claim 15, wherein thickness ranges are: PtSi(0.1-0.4 kÅ)/TiW(0.2-0.5 kÅ)/TiW(N)(1.0-2.0 kÅ)/TiW(0.1-0.5 kÅ)/Au(0.3-1.0 kÅ).
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