Patent US5808336A successfully refreshed from Google Patents.
US5808336A
Expired / Lapsed
US
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Storage device
Assignee: Canon Inc
•
Filing: 1995-05-05
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Granted: 1998-09-15
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Expires: 2015-05-05
Abstract
Abstract A storage device comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type contiguous to the first semiconductor region, a first electrode which is formed on a region for isolating the second and third semiconductor regions via an insulating layer, and a second electrode formed on the first electrode, but spaced therefrom by an insulating layer. The resistance between the first and second electrodes is selectively changed from a high-resistance state to a low-resistance state is needed, to record a bit of data.
Inventors
- 👤 Mamoru Miyawaki
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 01:53
CPC Classifications
H; H10; H10B; H10B20/00; H10B69/00; H10D; H10D86/00; H10D86/01; H10D86/201
Claims Analysis
Total Claims: 83
Claim 1
Independent Claim
115 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region that is for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state.
Claim 2
Dependent Claim
115 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region that is for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state.
Claim 3
Dependent Claim
23 words
A device according to claim 1, wherein the change in resistance is attained by a voltage to be applied to said second electrode.
Claim 4
Dependent Claim
149 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein a plurality of said storage devices are provided, the second semiconductor regions of said plurality of storage devices are connected to each other, and the third semiconductor regions thereof are connected to each other.
Claim 5
Dependent Claim
149 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein a plurality of said storage devices are provided, the second semiconductor regions of said plurality of storage devices are connected to each other, and the third semiconductor regions thereof are connected to each other.
Claim 6
Dependent Claim
21 words
A device according to claim 1, wherein said substrate comprises a substrate which has an Si layer on an insulating layer.
Claim 7
Dependent Claim
175 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein a plurality of said storage devices are arranged in a matrix, a line for commonly connecting the second electrodes in one direction of arrays is arranged, the first semiconductor regions of said storage devices arranged in a direction perpendicular to the line are commonly connected, and the first semiconductor regions in the respective arrays are electrically isolated from each other.
Claim 8
Dependent Claim
175 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein a plurality of said storage devices are arranged in a matrix, a line for commonly connecting the second electrodes in one direction of arrays is arranged, the first semiconductor regions of said storage devices arranged in a direction perpendicular to the line are commonly connected, and the first semiconductor regions in the respective arrays are electrically isolated from each other.
Claim 9
Dependent Claim
148 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein an opposing area between said first electrode and a semiconductor region having said first, second, and third semiconductor regions is larger than an opposing area of said second electrode and said first electrode.
Claim 10
Dependent Claim
148 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein an opposing area between said first electrode and a semiconductor region having said first, second, and third semiconductor regions is larger than an opposing area of said second electrode and said first electrode.
Claim 11
Dependent Claim
131 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein said first electrode has at last two opposing portions which sandwich said first semiconductor region therebetween.
Claim 12
Dependent Claim
131 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein said first electrode has at last two opposing portions which sandwich said first semiconductor region therebetween.
Claim 13
Dependent Claim
16 words
A device according to claim 1, wherein said first electrode consists of a material containing poly-Si.
Claim 14
Dependent Claim
35 words
A device according to claim 1, wherein an insulating layer between a semiconductor region including said first, second, and third semiconductor regions, and said first electrode comprises a film consisting of Si, N, and O.
Claim 15
Dependent Claim
18 words
A device according to claim 1, wherein a peripheral circuit of said storage device comprises a CMOS circuit.
Claim 16
Dependent Claim
15 words
A device according to claim 1, wherein said storage device is mounted on a card.
Claim 17
Dependent Claim
154 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein said first and second electrodes are arranged in a matrix, and a region for changing a resistance between the first and second electrodes on each intersection of the matrix from a high-resistance state to a low-resistance state is arranged.
Claim 18
Dependent Claim
154 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein said first and second electrodes are arranged in a matrix, and a region for changing a resistance between the first and second electrodes on each intersection of the matrix from a high-resistance state to a low-resistance state is arranged.
Claim 19
Dependent Claim
164 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein a plurality of said storage devices are provided, the first semiconductor region of a storage device in which information is written is connected to a desired power supply, and the first semiconductor region of a storage device in which no information is written is set in a floating state.
Claim 20
Dependent Claim
164 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, and wherein a plurality of said storage devices are provided, the first semiconductor region of a storage device in which information is written is connected to a desired power supply, and the first semiconductor region of a storage device in which no information is written is set in a floating state.
Claim 21
Dependent Claim
174 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, wherein said change is attained by a voltage to be applied to said second electrode, and wherein a first voltage V 1 to be applied to said second electrode when information is written in said storage device is higher than a second voltage V 2 to be applied to said second electrode when information is read out from said storage device.
Claim 22
Dependent Claim
174 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, wherein said change is attained by a voltage to be applied to said second electrode, and wherein a first voltage V 1 to be applied to said second electrode when information is written in said storage device is higher than a second voltage V 2 to be applied to said second electrode when information is read out from said storage device.
Claim 23
Dependent Claim
33 words
A device according to claim 7, wherein a semiconductor region having an impurity concentration higher than an impurity concentration of said first semiconductor region is arranged in contact with said first semiconductor region.
Claim 24
Dependent Claim
149 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, wherein a peripheral circuit of said storage device comprises a CMOS circuit; and wherein a circuit having a plurality of gate electrodes via floating gates is arranged in at least a portion of the peripheral circuit.
Claim 25
Dependent Claim
149 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, wherein a peripheral circuit of said storage device comprises a CMOS circuit; and wherein a circuit having a plurality of gate electrodes via floating gates is arranged in at least a portion of the peripheral circuit.
Claim 26
Dependent Claim
131 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, wherein said storage device is mounted on a card, and wherein the card comprises a read-only storage device.
Claim 27
Dependent Claim
131 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, wherein said storage device is mounted on a card, and wherein the card comprises a read-only storage device.
Claim 28
Dependent Claim
134 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, wherein said storage device is mounted on a card, and wherein the card comprises a light-emitting element and a light-receiving element.
Claim 29
Dependent Claim
134 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, wherein said storage device is mounted on a card, and wherein the card comprises a light-emitting element and a light-receiving element.
Claim 30
Dependent Claim
123 words
A device according to claim 13, wherein the following relations are satisfied: ##EQU3## where V BD is the voltage across said first and second electrodes when the resistance between said first and second electrodes changes from a high-resistance state to a low-resistance state, V th is the threshold value of an insulating gate transistor formed when said second and third semiconductor regions are assumed to be main electrode regions, said first semiconductor region is assumed to be a control electrode region, and said first electrode is assumed to be a control electrode, C FG is the capacitance formed between said first electrode, and said first, second, and third semiconductor regions, and C CG is the capacitance formed between said first and second electrodes.
Claim 31
Dependent Claim
191 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, wherein said storage device further comprises a second storage device selected from a group consisting of a DRAM, an SRAM and a flash memory, wherein data to be written is written in said storage device and the second storage device, the written data are read out from the two storage devices, and the two readout results are collated to each other, and wherein a region in which the collation result is written is arranged in said storage device.
Claim 32
Dependent Claim
191 words
A storage device which comprises, on a substrate, a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, wherein a resistance between said first and second electrodes is changed from a high-resistance state to a low-resistance state, wherein said storage device further comprises a second storage device selected from a group consisting of a DRAM, an SRAM and a flash memory, wherein data to be written is written in said storage device and the second storage device, the written data are read out from the two storage devices, and the two readout results are collated to each other, and wherein a region in which the collation result is written is arranged in said storage device.
Claim 33
Dependent Claim
122 words
A semiconductor device which comprises a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, and driving means for applying a voltage to said second electrode so that a resistance between said first and second electrodes is changed from a high resistance state to a low-resistance state.
Claim 34
Dependent Claim
122 words
A semiconductor device which comprises a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, a second electrode formed on said first electrode and spaced from said first electrode by a second insulating layer, and driving means for applying a voltage to said second electrode so that a resistance between said first and second electrodes is changed from a high resistance state to a low-resistance state.
Claim 35
Dependent Claim
48 words
A device according to claim 21, wherein a plurality of said storage devices are provided, and said second semiconductor region of one of said plurality of semiconductor devices and said third semiconductor region of another of said plurality of semiconductor devices are formed by a common semiconductor region.
Claim 36
Dependent Claim
18 words
A device according to claim 21, wherein a plurality of said semiconductor devices are provided on a substrate.
Claim 37
Dependent Claim
13 words
A device according to claim 23, wherein said substrate comprises an insulating surface.
Claim 38
Dependent Claim
61 words
A device according to claim 23, wherein said semiconductor devices are arranged in a matrix, a line for commonly connecting the second electrodes in a row direction of arrays is provided, said first semiconductor regions of said semiconductor devices arranged in a column direction are commonly connected, and said first semiconductor regions in respective rows are electrically isolated from each other.
Claim 39
Dependent Claim
40 words
A device according to claim 23, wherein an opposing area between said first electrode and a semiconductor region having said first, second, and third semiconductor regions is larger than an opposing area of said second electrode and said first electrode.
Claim 40
Dependent Claim
23 words
A device according to claim 23, wherein said first electrode has at least two opposing portions which sandwich said first semiconductor region therebetween.
Claim 41
Dependent Claim
15 words
A device according to claim 23, wherein said first electrode comprises a material containing poly-Si.
Claim 42
Dependent Claim
38 words
A device according to claim 23, wherein an insulating layer provided between a semiconductor region selected from among said first, second, and third semiconductor regions, and said first electrode comprises a film consisting of Si, N, and 0.
Claim 43
Dependent Claim
18 words
A device according to claim 23, wherein said semiconductor device further comprises a DRAM, SRAM or flash memory.
Claim 44
Dependent Claim
18 words
A device according to claim 23, wherein a peripheral circuit of said semiconductor device comprises a CMOS circuit.
Claim 45
Dependent Claim
15 words
A device according to claim 23, wherein said semiconductor device is mounted on a card.
Claim 46
Dependent Claim
68 words
A device according to claim 23, wherein a plurality of said semiconductor device s are provided, and each said device having a transistor, wherein said first semiconductor region of one of said semiconductor devices in which information is written is connected to a power supply, and said first semiconductor region of one of said semiconductor devices in which no information is written is set in a floating state.
Claim 47
Dependent Claim
56 words
A device according to claim 23, wherein a transistor is provided for applying to said second electrode a voltage V 2 when information is read out from said storage device, wherein said voltage V 2 is lower than a voltage V 1 to be applied to said second electrode for writing information in said semiconductor device.
Claim 48
Dependent Claim
33 words
A device according to claim 23, wherein a semiconductor region having an impurity concentration higher than an impurity concentration of said first semiconductor region is arranged in contact with said first semiconductor region.
Claim 49
Dependent Claim
46 words
A device according to claim 30, wherein data to be written is written in said semiconductor device, and also is written in said DRAM, SRAM or flash memory, and wherein both written data are read out, and the two read-out results are collated with each other.
Claim 50
Dependent Claim
29 words
A device according to claim 31, wherein a circuit having a plurality of gate electrodes via floating gates is arranged in at least a portion of the peripheral circuit.
Claim 51
Dependent Claim
14 words
A device according to claim 32, wherein the card comprises a read-only storage device.
Claim 52
Dependent Claim
17 words
A device according to claim 32, wherein the card comprises a light-emitting element and a light-receiving element.
Claim 53
Dependent Claim
113 words
A device according to claim 34, wherein the following relations are satisfied: ##EQU4## where V BD is the voltage across said first and second electrodes when the resistance between said first and second electrodes changes from a high-resistance state to a low-resistance state, V th is the threshold value of an insulating gate transistor having said second and third semiconductor regions as main electrode regions, said first semiconductor region as a control electrode region, and said first electrode as a control electrode, C FG is the capacitance formed between said first electrode, and said first, second, and third semiconductor regions, and C cd is the capacitance formed between said first and second electrodes.
Claim 54
Dependent Claim
22 words
A device according to claim 36, wherein a region in which the collation result is written is provided in said semiconductor device.
Claim 55
Dependent Claim
129 words
A storage device having plural memory cells each of which comprises a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by an insulating layer, wherein said plural memory cells include a memory cell having a high resistance between said first and second electrodes and a memory cell having a low resistance between said first and second electrodes.
Claim 56
Dependent Claim
129 words
A storage device having plural memory cells each of which comprises a first semiconductor region of one conductivity type, second and third semiconductor regions of a conductivity type opposite to the one conductivity type, which are contiguous to said first semiconductor region, a first electrode which is formed on and spaced from an isolating region for isolating said second and third semiconductor regions, said first electrode being spaced from the isolating region by a first insulating layer, and a second electrode formed on said first electrode and spaced from said first electrode by an insulating layer, wherein said plural memory cells include a memory cell having a high resistance between said first and second electrodes and a memory cell having a low resistance between said first and second electrodes.
Claim 57
Dependent Claim
39 words
A device according to claim 42, wherein said second semiconductor region of one of said plural memory cells and said third semiconductor region of an adjacent one of said plurality of storage devices are electrically connected to each other.
Claim 58
Dependent Claim
20 words
A device according to claim 42, wherein said memory cell is provided on a substrate which has an insulating layer.
Claim 59
Dependent Claim
61 words
A device according to claim 42, wherein said memory cells are arranged in a matrix, a wiring for commonly connecting the second electrodes in row direction of arrays is provided, the first semiconductor regions of said memory cells arranged in a column direction are commonly connected, and said first semiconductor regions in the respective arrays are electrically isolated from each other.
Claim 60
Dependent Claim
44 words
A device according to claim 42, including a memory cell wherein an opposing area between said first electrode and a semiconductor region having said first, second, and third semiconductor regions is larger than an opposing area of said second electrode and said first electrode.
Claim 61
Dependent Claim
23 words
A device according to claim 42, wherein said first electrode has at least two opposing potions which sandwich said first semiconductor region therebetween.
Claim 62
Dependent Claim
15 words
A device according to claim 42, wherein said first electrode comprises a material containing poly-Si.
Claim 63
Dependent Claim
35 words
A device according to claim 42, wherein an insulating layer between a semiconductor region including said first, second, and third semiconductor regions, and said first electrode comprises a film consisting of Si, N, and 0.
Claim 64
Dependent Claim
19 words
A device according to claim 42, wherein said storage device further comprises a DRAM, S RAM or flash memory.
Claim 65
Dependent Claim
18 words
A device according to claim 42, wherein a peripheral circuit of said memory cells comprises a CMOS circuit.
Claim 66
Dependent Claim
15 words
A device according to claim 42, wherein said storage device is mounted on a card.
Claim 67
Dependent Claim
33 words
A device according to claim 42, wherein a semiconductor region having an impurity concentration higher than an impurity concentration of said first semiconductor region is arranged in contact with said first semiconductor region.
Claim 68
Dependent Claim
41 words
A device according to claim 50, wherein data to be written is written in said storage device and in said DRAM, SRAM or flash memory, both written data are read out, and the two read-out results are collated to each other.
Claim 69
Dependent Claim
29 words
A device according to claim 51, wherein a circuit having a plurality of gate electrodes via floating gates is provided in at least a portion of the peripheral circuit.
Claim 70
Dependent Claim
14 words
A device according to claim 52, wherein the card comprises a read-only storage device.
Claim 71
Dependent Claim
17 words
A device according to claim 52, wherein the card comprises a light-emitting element and a light-receiving element.
Claim 72
Dependent Claim
132 words
A device according to claim 42, wherein the following relations are satisfied: wherein V 1 is a voltage used for writing information, V 2 is a voltage used for reading written information, V BD is the voltage across said first and second electrodes when the resistance between said first and second electrodes changes from a high-resistance state to a low resistance state, V th is the threshold value of an insulating gate transistor having said second and third semiconductor regions as main electrode regions, said first semiconductor region as a control electrode region, and said first electrode as a control electrode, C FG is the capacitance formed between said first electrode, and said first, second and third semiconductor regions, and C CG is the capacitance formed between said first and second electrodes.
Claim 73
Dependent Claim
22 words
A device according to claim 54, wherein a region in which the collation result is written is provided in said storage device.
Claim 74
Dependent Claim
171 words
A semiconductor device having memory cells arranged in a matrix of plural rows and plural columns, wherein each cell comprises: a first semiconductor region of a first conductivity type; second and third semiconductor regions of a second conductivity type provided adjacent to said first conductivity region; a first electrode provided on said first semiconductor region and spaced therefrom by a first insulating layer; and a second electrode provided on said first electrode and spaced therefrom by a second insulating layer, wherein said second electrodes of said memory cells arranged in each row are connected commonly, and independently electrically for each row, and wherein said first semiconductor regions of respective memory cells arranged in each column are connected commonly, and independently for each row electrically, and wherein a circuit is provided for applying predetermined different voltages to said second electrode and said first semiconductor region, so that the resistance between the first and second electrodes of a selected memory cell is changed from a high resistance state into a low resistance state.
Claim 75
Dependent Claim
171 words
A semiconductor device having memory cells arranged in a matrix of plural rows and plural columns, wherein each cell comprises: a first semiconductor region of a first conductivity type; second and third semiconductor regions of a second conductivity type provided adjacent to said first conductivity region; a first electrode provided on said first semiconductor region and spaced therefrom by a first insulating layer; and a second electrode provided on said first electrode and spaced therefrom by a second insulating layer, wherein said second electrodes of said memory cells arranged in each row are connected commonly, and independently electrically for each row, and wherein said first semiconductor regions of respective memory cells arranged in each column are connected commonly, and independently for each row electrically, and wherein a circuit is provided for applying predetermined different voltages to said second electrode and said first semiconductor region, so that the resistance between the first and second electrodes of a selected memory cell is changed from a high resistance state into a low resistance state.
Claim 76
Dependent Claim
22 words
A device according to claim 60, wherein said second and third semiconductor regions of memory cells of each column are connected serially.
Claim 77
Dependent Claim
24 words
A device according to claim 60, wherein said second and third semiconductor regions of the memory cells of each column are connected in parallel.
Claim 78
Dependent Claim
157 words
A semiconductor device having memory cells arranged in a matrix of plural rows and plural columns, wherein each cell comprises: a first semiconductor region of a first conductivity type; second and third semiconductor regions of a second conductivity type provided adjacent to said first conductivity region; a first electrode provided on said first semiconductor region and spaced therefrom by a first insulating layer; and a second electrode provided on said first electrode and spaced therefrom by a second insulating layer, wherein said second electrodes of said memory cells arranged in each row are connected commonly, and independently electrically for each row, and wherein said first semiconductor regions of respective memory cells arranged in each column are connected commonly, and independently for each row electrically, and wherein one of said memory cells is at a lower resistance state at a section between its first and second electrodes than the resistance of the others, so that information is stored.
Claim 79
Dependent Claim
157 words
A semiconductor device having memory cells arranged in a matrix of plural rows and plural columns, wherein each cell comprises: a first semiconductor region of a first conductivity type; second and third semiconductor regions of a second conductivity type provided adjacent to said first conductivity region; a first electrode provided on said first semiconductor region and spaced therefrom by a first insulating layer; and a second electrode provided on said first electrode and spaced therefrom by a second insulating layer, wherein said second electrodes of said memory cells arranged in each row are connected commonly, and independently electrically for each row, and wherein said first semiconductor regions of respective memory cells arranged in each column are connected commonly, and independently for each row electrically, and wherein one of said memory cells is at a lower resistance state at a section between its first and second electrodes than the resistance of the others, so that information is stored.
Claim 80
Dependent Claim
22 words
A device according to claim 61, wherein said second and third semiconductor regions of memory cells of each column are connected serially.
Claim 81
Dependent Claim
24 words
A device according to claim 61, wherein said second and third semiconductor regions of the memory cells of each column are connected in parallel.
Claim 82
Dependent Claim
42 words
A device according to claim 1, wherein plural said storage devices are provided, and wherein ones of said storage devices which are arranged adjacent to each other in a column or row direction share at least second or third semiconductor region respectively.
Claim 83
Dependent Claim
36 words
A device according to claim 1, wherein plural said storage devices are provided, and wherein ones of said storage devices which are arranged adjacent to each other in a column or row direction are connected serially.
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