US5805871A
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System and method for phase-synchronous, flexible-frequency clocking and messaging
Assignee: Ricoh Co Ltd
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Filing: 1995-07-21
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Granted: 1998-09-08
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Expires: 2015-07-21
Abstract
Abstract A master time-base unit generates quadrature-phase sinusoidal system reference signals that are phase-locked to a frequency reference oscillator. Based upon messaging signals received from an external source, each system reference signals is modulated according to direct carrier amplitude modulation, and is distributed to local time-base units via a transmission line. Within each local time-base unit, local reference signals and an offset signal are generated, where the local reference signals are phase-locked to the modulated system reference signals. A local reference signal and the offset signal are mixed to generate a local timing signal via frequency upconversion. A frequency-divided version of the local timing signal is phase-locked to a frequency-divided version of a local reference signal. Reprogrammable frequency dividers in combination with phase-lock facilitate the programmable specification of local timing signal frequencies. Within each local time-base unit, the modulated system reference signals are synchronously demodulated to produce bit sequences. The bit sequences are converted into synchronous messages and/or synchronous data, facilitating system-wide broadcast-type operations characterized by latencies measured in nanoseconds.
Inventors
- 👤 Michael A. Baxter
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-05 01:41
CPC Classifications
G; G06; G06F; G06F1/00; G06F1/04; H; H04; H04J; H04J3/00; H04J3/02; H04J3/06; H04J3/0635; H04J3/0685
Claims Analysis
Total Claims: 45
Claim 1
Independent Claim
99 words
A system for clocking comprising: a master unit having an output, for producing a set of sinusoidal timing reference signals, wherein the set of sinusoidal timing reference signals comprises a first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first sinusoidal timing reference signal having a fixed phase offset relative to the second sinusoidal timing reference signal; and a first local unit having an input coupled to the output of the master unit, for generating a first local timing signal using a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals.
Claim 2
Independent Claim
99 words
A system for clocking comprising: a master unit having an output, for producing a set of sinusoidal timing reference signals, wherein the set of sinusoidal timing reference signals comprises a first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first sinusoidal timing reference signal having a fixed phase offset relative to the second sinusoidal timing reference signal; and a first local unit having an input coupled to the output of the master unit, for generating a first local timing signal using a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals.
Claim 3
Dependent Claim
15 words
The system of claim 1, wherein the fixed phase offset is a quadrature phase offset.
Claim 4
Dependent Claim
134 words
The system of claim 1, wherein the master unit comprises: a master oscillator having an output and providing an original frequency reference signal; a phase detector having a first input, a second input, and an output, the first input of the phase detector coupled to the output of the master oscillator; a loop filter having an input and an output, the input of the loop filter coupled to the output of the phase detector; and a secondary oscillator having a control input and a set of outputs, the control input of the secondary oscillator coupled to the output of the loop filter and the output of the secondary oscillator coupled to the second input of the phase detector, the set of outputs of the secondary oscillator providing the set of sinusoidal timing reference signals.
Claim 5
Dependent Claim
52 words
The system of claim 3, wherein the secondary oscillator comprises an Armstrong RF oscillator coupled to a common-base feedback circuit, the secondary oscillator providing a first sinusoidal signal at a first output and a second sinusoidal signal at a second output, the first and second sinusoidal signals having a quadrature phase relationship.
Claim 6
Dependent Claim
152 words
The system of claim 1, wherein the master unit comprises: a master oscillator having an output and providing an original frequency reference signal and a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals; a phase detector having a first input, a second input, and an output, the first input of the phase detector coupled to the output of the master oscillator; a loop filter having an input and an output, the input of the loop filter coupled to the output of the phase detector; and a secondary oscillator having a control input and an output, the control input of the secondary oscillator coupled to the output of the loop filter and the output of the secondary oscillator coupled to the second input of the phase detector, the output of the secondary oscillator providing a second sinusoidal timing reference signal within the set of sinusoidal timing reference signals.
Claim 7
Dependent Claim
19 words
The system of claim 5, wherein the first and second sinusoidal timing reference signals maintain a quadrature phase relationship.
Claim 8
Dependent Claim
13 words
The system of claim 1, wherein the local unit comprises a frequency divider.
Claim 9
Dependent Claim
34 words
The system of claim 1, wherein the local unit comprises a phase-locked loop for generating a local reference signal phase-locked to a sinusoidal timing reference signal within the set of sinusoidal timing reference signals.
Claim 10
Dependent Claim
70 words
The system of claim 1, wherein the local unit comprises: an offset oscillator having an output; and a mixer having a first input, a second input, and an output, the first input of the mixer coupled to the output of the master unit, the second input of the mixer coupled to the output of the offset oscillator, the output of the mixer coupled to an output of the local unit.
Claim 11
Dependent Claim
86 words
The system of claim 9, wherein the local unit further comprises a diplexer having an input, a first output, and a second output, the input of the diplexer coupled to the output of the mixer, the first output of the diplexer coupled to an input of a mixer termination, the second output of the diplexer coupled to the output of the local unit, wherein the diplexer provides a low-frequency mixing product signal at its first output and a high-frequency mixing product signal at its second output.
Claim 12
Dependent Claim
42 words
The system of claim 9, wherein the local unit further comprises a limiter having an input and an output, the input of the limiter coupled to the output of the mixer, the output of the limiter providing the first local timing signal.
Claim 13
Dependent Claim
101 words
The system of claim 9, wherein the local unit further comprises: a phase and frequency detector having a first input, a second input, and an output, the output of the phase and frequency detector coupled to a control input of the offset oscillator; a first frequency divider having an input coupled to the output of the mixer and an output coupled to the first input of the phase and frequency detector; and a second frequency divider having an input coupled to the output of the master unit and an output coupled to the second input of the phase and frequency detector.
Claim 14
Dependent Claim
19 words
The system of claim 12, wherein the phase and frequency detector comprises a portion of a reprogrammable logic device.
Claim 15
Dependent Claim
18 words
The system of claim 12, wherein the first frequency divider comprises a portion of a reprogrammable logic device.
Claim 16
Dependent Claim
18 words
The system of claim 12, wherein the second frequency divider comprises a portion of a reprogrammable logic device.
Claim 17
Dependent Claim
42 words
The system of claim 1, further comprising a second local unit having an input coupled to the output of the master unit, for generating a second local timing signal from the first sinusoidal signal within the set of sinusoidal timing reference signals.
Claim 18
Independent Claim
108 words
A system for clocking comprising: a master unit having a first output, for producing a set of sinusoidal timing reference signals, wherein the set of sinusoidal timing reference signals comprises a first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first sinusoidal timing reference signal having a fixed phase offset relative to the second sinusoidal timing reference signal; and a plurality of local units, each local unit having a first input passively coupled to the first output of the master unit, each local unit generating a local timing signal using a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals.
Claim 19
Independent Claim
108 words
A system for clocking comprising: a master unit having a first output, for producing a set of sinusoidal timing reference signals, wherein the set of sinusoidal timing reference signals comprises a first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first sinusoidal timing reference signal having a fixed phase offset relative to the second sinusoidal timing reference signal; and a plurality of local units, each local unit having a first input passively coupled to the first output of the master unit, each local unit generating a local timing signal using a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals.
Claim 20
Dependent Claim
30 words
The system of claim 17, wherein the first input of each local unit is coupled to the first output of the master unit by a scalable passive signal distribution means.
Claim 21
Dependent Claim
16 words
The system of claim 18, wherein the scalable passive signal distribution means is a transmission line.
Claim 22
Independent Claim
137 words
A system for combined clocking and messaging comprising: a master unit having an output, for producing a set of sinusoidal timing reference signals and for modulating the amplitude of a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals, wherein the set of sinusoidal timing reference signals comprises a first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first sinusoidal timing reference signal having a fixed phase offset relative to the second sinusoidal timing reference signal; and a first local unit having an input, for providing a first local timing signal using a sinusoidal timing reference signal within the set of sinusoidal timing reference signals and for demodulating the first sinusoidal timing reference signal, the input of the first local unit coupled to the output of the master unit.
Claim 23
Independent Claim
137 words
A system for combined clocking and messaging comprising: a master unit having an output, for producing a set of sinusoidal timing reference signals and for modulating the amplitude of a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals, wherein the set of sinusoidal timing reference signals comprises a first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first sinusoidal timing reference signal having a fixed phase offset relative to the second sinusoidal timing reference signal; and a first local unit having an input, for providing a first local timing signal using a sinusoidal timing reference signal within the set of sinusoidal timing reference signals and for demodulating the first sinusoidal timing reference signal, the input of the first local unit coupled to the output of the master unit.
Claim 24
Dependent Claim
59 words
The system of claim 20, further comprising a second local unit having an input, for providing a second local timing signal using a sinusoidal timing reference signal within the set of sinusoidal timing reference signals and for demodulating the first sinusoidal timing reference signal, the input of the second local unit coupled to the output of the master unit.
Claim 25
Independent Claim
248 words
A system for flexible-frequency clocking and messaging comprising: a master unit having an oscillator for producing a set of sinusoidal timing reference signals and a modulator for changing the amplitude of a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals in response to a control signal, the master unit having an output, wherein the set of sinusoidal timing reference signals comprises a first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first sinusoidal timing reference signal having a fixed phase offset relative to the second sinusoidal timing reference signal; and a local unit having an offset oscillator for producing an offset signal, a mixer for producing a local timing signal using the offset signal and a sinusoidal timing reference signal within the set of sinusoidal timing reference signals, a first reprogrammable frequency divider for providing a frequency-divided version of the local timing signal, a second reprogrammable frequency divider for providing a frequency-divided version of a sinusoidal timing reference signal within the set of sinusoidal timing reference signals, a phase and frequency detector for controlling the offset oscillator based upon a frequency difference and a phase difference between the frequency-divided version of the local timing signal and the frequency-divided version of the sinusoidal timing reference signal, and a demodulation unit for demodulating the first sinusoidal timing reference signal within the set of sinusoidal timing reference signals, the local unit having an input coupled to the output of the master unit.
Claim 26
Independent Claim
248 words
A system for flexible-frequency clocking and messaging comprising: a master unit having an oscillator for producing a set of sinusoidal timing reference signals and a modulator for changing the amplitude of a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals in response to a control signal, the master unit having an output, wherein the set of sinusoidal timing reference signals comprises a first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first sinusoidal timing reference signal having a fixed phase offset relative to the second sinusoidal timing reference signal; and a local unit having an offset oscillator for producing an offset signal, a mixer for producing a local timing signal using the offset signal and a sinusoidal timing reference signal within the set of sinusoidal timing reference signals, a first reprogrammable frequency divider for providing a frequency-divided version of the local timing signal, a second reprogrammable frequency divider for providing a frequency-divided version of a sinusoidal timing reference signal within the set of sinusoidal timing reference signals, a phase and frequency detector for controlling the offset oscillator based upon a frequency difference and a phase difference between the frequency-divided version of the local timing signal and the frequency-divided version of the sinusoidal timing reference signal, and a demodulation unit for demodulating the first sinusoidal timing reference signal within the set of sinusoidal timing reference signals, the local unit having an input coupled to the output of the master unit.
Claim 27
Independent Claim
94 words
A method for clocking comprising the steps of: generating a set of sinusoidal timing reference signals within a master unit, wherein the set of sinusoidal timing reference signals comprises a first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first sinusoidal timing reference signal maintaining a fixed phase relationship with the second sinusoidal timing reference signal; receiving a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals at a first local unit; and generating a first local timing signal using the first sinusoidal timing reference signal.
Claim 28
Independent Claim
94 words
A method for clocking comprising the steps of: generating a set of sinusoidal timing reference signals within a master unit, wherein the set of sinusoidal timing reference signals comprises a first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first sinusoidal timing reference signal maintaining a fixed phase relationship with the second sinusoidal timing reference signal; receiving a first sinusoidal timing reference signal within the set of sinusoidal timing reference signals at a first local unit; and generating a first local timing signal using the first sinusoidal timing reference signal.
Claim 29
Dependent Claim
14 words
The method of claim 23, wherein the phase relationship is a quadrature phase relationship.
Claim 30
Dependent Claim
33 words
The method of claim 23, wherein the step of generating the first local timing signal comprises the step of generating a local timing reference signal phase-locked to the first sinusoidal timing reference signal.
Claim 31
Dependent Claim
39 words
The method of claim 23, wherein the step of generating the first local timing signal comprises the steps of: generating an offset signal; and performing a frequency conversion using the offset signal and the first sinusoidal timing reference signal.
Claim 32
Dependent Claim
36 words
The method of claim 26, wherein the step of generating the first local timing signal further comprises the step of providing a high-frequency mixing product signal to a limiter to produce the first local timing signal.
Claim 33
Dependent Claim
53 words
The method of claim 23, further comprising the steps of: generating a frequency-divided version of the first local timing signal; generating a frequency-divided version of the first sinusoidal timing reference signal; and phase-locking the frequency-divided version of the first sinusoidal timing reference signal to the frequency-divided version of the first local timing signal.
Claim 34
Dependent Claim
29 words
The method of claim 28, wherein the step of generating the frequency-divided version of the first local timing signal comprises the substep of programmably specifying a frequency divider constant.
Claim 35
Dependent Claim
49 words
The method of claim 23, further comprising the steps of: receiving the first sinusoidal timing reference signal within the set of sinusoidal timing reference signals at a second local unit; and generating a second local timing signal using the first sinusoidal timing reference signal within the second local unit.
Claim 36
Dependent Claim
29 words
The method of claim 30, further comprising the step of distributing the first sinusoidal timing reference signal to each local unit using a single scalable passive signal distribution means.
Claim 37
Independent Claim
118 words
A method for combined clocking and messaging comprising the steps of: generating a set of sinusoidal timing reference signals within a master unit, wherein the set of sinusoidal timing reference signals comprises the first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first and second sinusoidal timing reference signals maintaining a fixed phase relationship; modulating the amplitude of a first sinusoidal timing reference signal according to a first control signal; receiving the modulated first sinusoidal timing reference signal at a local unit; generating a local timing signal using a sinusoidal timing reference signal within the set of sinusoidal timing reference signals; and demodulating the first sinusoidal timing reference signal to produce a messaging signal.
Claim 38
Independent Claim
118 words
A method for combined clocking and messaging comprising the steps of: generating a set of sinusoidal timing reference signals within a master unit, wherein the set of sinusoidal timing reference signals comprises the first sinusoidal timing reference signal and a second sinusoidal timing reference signal, the first and second sinusoidal timing reference signals maintaining a fixed phase relationship; modulating the amplitude of a first sinusoidal timing reference signal according to a first control signal; receiving the modulated first sinusoidal timing reference signal at a local unit; generating a local timing signal using a sinusoidal timing reference signal within the set of sinusoidal timing reference signals; and demodulating the first sinusoidal timing reference signal to produce a messaging signal.
Claim 39
Dependent Claim
14 words
The method of claim 32, wherein the phase relationship is a quadrature phase relationship.
Claim 40
Dependent Claim
25 words
The method of claim 32, wherein the messaging signal comprises one from a group of a reset signal, an interrupt signal, and a data word.
Claim 41
Dependent Claim
34 words
The method of claim 32, further comprising the step of modulating the amplitude of a second sinusoidal timing reference signal within the set of sinusoidal timing reference signals according to a second control signal.
Claim 42
Dependent Claim
37 words
The method of claim 35, wherein the steps of modulating the amplitude of the first sinusoidal timing reference signal and modulating the amplitude of the second sinusoidal timing reference signal are performed according to Quadrature Amplitude Modulation.
Claim 43
Dependent Claim
25 words
The method of claim 32, wherein step of modulating is performed at a rate equal to the period of the first sinusoidal timing reference signal.
Claim 44
Dependent Claim
45 words
The method of claim 32, wherein the step of demodulating comprises the steps of: producing a rectified version of the modulated first sinusoidal timing reference signal; and integrating the rectified version of the modulated first sinusoidal timing reference signal over a portion of its period.
Claim 45
Dependent Claim
24 words
The method of claim 38, further comprising the step of generating a bit sequence based upon a value generated during the step of integrating.
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