CoSi2 salicide method

Claim 1

A method for forming self-aligned polycrystalline cobalt disilicide on a metal oxide semiconductor transistor in a silicon substrate, said transistor having an actual gate length of about 0.18 μm or smaller and having a source region, a drain region, and a gate region, comprising the steps of: defining an active area within said silicon substrate; growing an oxide on said substrate; depositing a polysilicon layer on said oxide; defining said gate region said source region, and said draining region of said transistor within said active area; depositing a cobalt layer on said substrate; thereafter depositing a refractory metal layer on said cobalt layer; thereafter heating said silicon substrate whereby forming a polycrystalline cobalt disilicide layer on said gate region, said source region, and said drain region of said MOS transistor, said heating step comprising the substeps of a first and a second heating step, said second heating step being performed at a higher temperature than said first heating step; and selectively etching, using a H 2 SO 4 solution and a NH 4 OH solution as etchants, in between said first and said second heating step the remaining nonsilicide cobalt and said refractory metal from said substrate except from said gate region, said source region, and said drain region.

Claim 2

A method for forming self-aligned polycrystalline cobalt disilicide on a metal oxide semiconductor transistor in a silicon substrate, said transistor having an actual gate length of about 0.18 μm or smaller and having a source region, a drain region, and a gate region, comprising the steps of: defining an active area within said silicon substrate; growing an oxide on said substrate; depositing a polysilicon layer on said oxide; defining said gate region said source region, and said draining region of said transistor within said active area; depositing a cobalt layer on said substrate; thereafter depositing a refractory metal layer on said cobalt layer; thereafter heating said silicon substrate whereby forming a polycrystalline cobalt disilicide layer on said gate region, said source region, and said drain region of said MOS transistor, said heating step comprising the substeps of a first and a second heating step, said second heating step being performed at a higher temperature than said first heating step; and selectively etching, using a H 2 SO 4 solution and a NH 4 OH solution as etchants, in between said first and said second heating step the remaining nonsilicide cobalt and said refractory metal from said substrate except from said gate region, said source region, and said drain region.