US5767000A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Method of manufacturing subfield conductive layer
Assignee: GlobalFoundries Inc
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Filing: 1996-06-05
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Granted: 1998-06-16
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Expires: 2016-06-05
Abstract
Abstract A subfield conductive layer is provided, wherein a conductive layer is implanted beneath and laterally adjacent a field dielectric. The subfield conductive layer is placed within the silicon substrate after the field dielectric is formed. The conductive layer represents a buried interconnect which resides between isolated devices. The buried interconnect, however, is formed using high energy ion implant through a field dielectric formed either by LOCOS or shallow trench isolation techniques. The buried interconnect, or conductive layer, resides and electrically connects source and drain regions of two isolated devices.
Inventors
- 👤 H. Jim Fulford, Jr.
- 👤 Robert Dawson
- 👤 Fred N. Hause
- 👤 Basab Bandyopadhyay
- 👤 Mark W. Michael
- 👤 William S. Brennan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-08 14:31
CPC Classifications
H; H10; H10W; H10W15/00; H10W15/01
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
106 words
A method for forming a conductive layer, comprising: providing an integrated circuit topography which includes a field dielectric interposed between a pair of active areas; applying a masking layer over said active areas a spaced distance from said field dielectric to form a partially masked integrated circuit topography; implanting first dopant ions entirely across said partially masked integrated circuit topography to form a conductive layer in regions below and adjacent to said field dielectric; and implanting second dopant ions of the same conductivity type as said first dopant ions into source and drain regions configured adjacent said field dielectric in electrical communication with said conductive layer.
Claim 2
Independent Claim
106 words
A method for forming a conductive layer, comprising: providing an integrated circuit topography which includes a field dielectric interposed between a pair of active areas; applying a masking layer over said active areas a spaced distance from said field dielectric to form a partially masked integrated circuit topography; implanting first dopant ions entirely across said partially masked integrated circuit topography to form a conductive layer in regions below and adjacent to said field dielectric; and implanting second dopant ions of the same conductivity type as said first dopant ions into source and drain regions configured adjacent said field dielectric in electrical communication with said conductive layer.
Claim 3
Dependent Claim
16 words
The method as recited in claim 1, wherein said field dielectric comprises a thermally grown oxide.
Claim 4
Dependent Claim
30 words
The method as recited in claim 1, wherein said providing step comprises providing a silicon surface between said active areas, and then thermally growing an oxide upon said silicon surface.
Claim 5
Dependent Claim
24 words
The method as recited in claim 1, wherein said field dielectric comprises a trench formed within a substrate thereafter filled with a deposited oxide.
Claim 6
Dependent Claim
34 words
The method as recited in claim 1, wherein said providing step comprises etching a substantially planar silicon surface to form a trench therein, and then filling said trench with a chemical vapor deposited oxide.
Claim 7
Dependent Claim
32 words
The method as recited in claim 1, wherein said applying step comprises depositing a photoresist layer across said integrated circuit topography and then selectively removing said photoresist layer from said field dielectric.
Claim 8
Dependent Claim
16 words
The method as recited in claim 1, wherein said spaced distance is 0.2 to 2.0 microns.
Claim 9
Dependent Claim
36 words
The method as recited in claim 1, wherein the step of depositing said first dopant ions comprises implanting at a concentration between 1×10 15 to 1×10 16 ions/cm 2 and at an energy exceeding 350 keV.
Claim 10
Dependent Claim
26 words
The method as recited in claim 1, wherein said first dopant ions and said second dopant ions comprise n-type ions implanted into a p-type silicon substrate.
Claim 11
Dependent Claim
26 words
The method as recited in claim 1, wherein said first dopant ions and said second dopant ions comprise p-type ions implanted into an n-type silicon substrate.
References Cited (Backward Citations)
US4493740A
Cited
US4653177A
Cited
US4987093A
Cited
US4994407A
Cited
US5141882A
Cited
US5266510A
Cited
US5173438A
Cited
US5401671A
Cited
US5212111A
Cited
US5372963A
Cited
US5342803A
Cited
US5405788A
Cited
US5529948A
Cited
US5468677A
Cited
US5624859A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-06-15 | 2001-12-15 | 2002-06-16 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-06-15 | 2005-12-15 | 2006-06-16 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-06-15 | 2009-12-15 | 2010-06-16 | $7700.00 | Window Closed / Lapsed |