US4987093A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Through-field implant isolated devices and method
Assignee: Texas Instruments Inc
•
Filing: 1989-10-24
•
Granted: 1991-01-22
•
Expires: 2009-10-24
Abstract
Abstract Preferred embodiments include channel stop implants for CMOS devices by through field boron implants (152) after the field oxide (144, 145) has been grown and with the implant depth determined by the thin portions of the field oxide (145). Junction (154) breakdown is preserved by channeling the implant (152) to penetrate far below the junctions (154).
Inventors
- 👤 Clarence W. Teng
- 👤 Roger A. Haken
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 04:07
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10P30/21; H10P30/212; H10W; H10W10/00; H10W10/01; H10W10/011; H10W10/012; H10W10/0125; H10W10/0126; H10W10/10; H10W10/13
Claims Analysis
Total Claims: 4
Claim 1
Independent Claim
169 words
A method of isolation fabrication of an integrated circuit having a surface with active regions, with at least some of said active regions containing NMOS transistors, said method comprising: a. growing a field oxide on regions of the surface, said field oxide having at least two different widths, with some of said widths being substantially greater than 1 micron, and with some of said widths being less than about 1 micron, with said growing of field oxide creating an oxide-silicon interface beneath said oxide; and b. implanting channel stop dopants in said integrated circuit without active area masking, said implanting being at an energy high enough to implant channel stop dopants through field oxide in regions having widths less than about 1 micron to provide a maximum of implanting channel stop dopants in silicon under said oxide-silicon interface, but with said implanting being at an energy low enough to provide a maximum of implanting channel stop dopants within said field oxide regions having widths substantially greater than 1 micron.
Claim 2
Independent Claim
169 words
A method of isolation fabrication of an integrated circuit having a surface with active regions, with at least some of said active regions containing NMOS transistors, said method comprising: a. growing a field oxide on regions of the surface, said field oxide having at least two different widths, with some of said widths being substantially greater than 1 micron, and with some of said widths being less than about 1 micron, with said growing of field oxide creating an oxide-silicon interface beneath said oxide; and b. implanting channel stop dopants in said integrated circuit without active area masking, said implanting being at an energy high enough to implant channel stop dopants through field oxide in regions having widths less than about 1 micron to provide a maximum of implanting channel stop dopants in silicon under said oxide-silicon interface, but with said implanting being at an energy low enough to provide a maximum of implanting channel stop dopants within said field oxide regions having widths substantially greater than 1 micron.
Claim 3
Dependent Claim
38 words
The method of claim 1, wherein: (a) said channel stop dopants are boron; and (b) said active device regions are moats to be doped n or p type for n and p channel field effect transistor active devices.
Claim 4
Dependent Claim
33 words
The method of claim 2, wherein: said implant of channel stop dopants is performed with the dopant ion beam aligned to provide maximal channeling of the dopant ions in the active device regions.
References Cited (Backward Citations)
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-01-21 | 1994-07-23 | 1995-01-22 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-01-21 | 1998-07-23 | 1999-01-22 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-01-21 | 2002-07-23 | 2003-01-22 | $7700.00 | Window Closed / Lapsed |