US5748488A
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US
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Method for generating a logic circuit from a hardware independent user description using assignment conditions
Assignee: Synopsys Inc
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Filing: 1995-06-07
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Granted: 1998-05-05
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Expires: 2015-06-07
Abstract
Abstract A method and system are provided for generating a logic network using a hardware independent description means. A logic circuit synthesizer, in response to a user description specifying only signals and the circumstances under which the signals are produced, generates a logic network that generates the signals specified in the user description, e.g., a net list of logic elements, such as logic gates, high impedance drivers, level sensitive latches and edge sensitive flip-flops along with the interconnections of the logic elements. In one embodiment, the logic circuit synthesizer includes a preprocessor means and a logic circuit generator means. The preprocessor means, in response to the user description, converts signals and conditions in the user description into a structure having nodes interconnected by edges. The edges include an edge condition under which the edge is traversed. The logic circuit generator, using the structure and the edge conditions, creates a logic network that generates the signals specified in the user description.
Inventors
- 👤 Brent L. Gregory
- 👤 Russell B. Segal
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 23:26
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30
Claims Analysis
Total Claims: 16
Claim 1
Independent Claim
113 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components comprising: converting a flow control statement and a directive statement in the user description for a logic signal Q into an assignment condition for at least one of a plurality of functions including an asynchronous load function AL( ), an asynchronous data function AD( ), and a high impendance function Z( ); and generating a hardware element using said assignment condition, wherein a type of said hardware element and a configuration of said hardware element is dependent upon the assignment condition.
Claim 2
Independent Claim
113 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components comprising: converting a flow control statement and a directive statement in the user description for a logic signal Q into an assignment condition for at least one of a plurality of functions including an asynchronous load function AL( ), an asynchronous data function AD( ), and a high impendance function Z( ); and generating a hardware element using said assignment condition, wherein a type of said hardware element and a configuration of said hardware element is dependent upon the assignment condition.
Claim 3
Dependent Claim
56 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 1 wherein said plurality of functions further comprises a synchronous load function SL( ), and a synchronous data function SD( ).
Claim 4
Dependent Claim
49 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 2 wherein said plurality of functions further comprises a don't care function DC( ).
Claim 5
Dependent Claim
49 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 1 wherein said plurality of functions further comprises a don't care function DC( ).
Claim 6
Dependent Claim
63 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 1 further comprising; boolean minimizing said assignment condition with a complement of another assignment condition as a don't care condition prior to performing said generating a hardware element.
Claim 7
Dependent Claim
66 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 1 further comprising: boolean minimizing said assignment condition with another assignment condition as a don't care condition to obtain a new assignment condition when both said assignment conditions are not zero.
Claim 8
Dependent Claim
74 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 6 further comprising: boolean minimizing said new assignment condition with a complement of yet another assignment condition as a don't care condition when said yet another assignment condition is not a constant to obtain a second new assignment condition.
Claim 9
Independent Claim
113 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components comprising: converting a flow control statement and a directive statement in the user description for a logic signal Q into an assignment condition for at least one of a plurality of functions including a synchronous load function SL( ), a synchronous data function SD( ), and a high impendance function Z( ); and generating a hardware element using said assignment condition, wherein a type of said hardware element and a configuration of said hardware element is dependent upon the assignment condition.
Claim 10
Independent Claim
113 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components comprising: converting a flow control statement and a directive statement in the user description for a logic signal Q into an assignment condition for at least one of a plurality of functions including a synchronous load function SL( ), a synchronous data function SD( ), and a high impendance function Z( ); and generating a hardware element using said assignment condition, wherein a type of said hardware element and a configuration of said hardware element is dependent upon the assignment condition.
Claim 11
Dependent Claim
56 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 8 wherein said plurality of functions further comprises an asynchronous load function A( ), and an asynchronous data function AD( ).
Claim 12
Dependent Claim
49 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 9 wherein said plurality of functions further comprises a don't care function DC( ).
Claim 13
Dependent Claim
49 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 8 wherein said plurality of functions further comprises a don't care function DC( ).
Claim 14
Dependent Claim
63 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 8 further comprising; boolean minimizing said assignment condition with a complement of another assignment condition as a don't care condition prior to performing said generating a hardware element.
Claim 15
Dependent Claim
66 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 8 further comprising: boolean minimizing said assignment condition with another assignment condition as a don't care condition to obtain a new assignment condition when both said assignment conditions are not zero.
Claim 16
Dependent Claim
74 words
A method for converting a hardware independent user description of a logic circuit, that includes flow control statements, and directive statements that define levels of logic signals, into logic circuit hardware components as in claim 13 further comprising: boolean minimizing said new assignment condition with a complement of yet another assignment condition as a don't care condition when said yet another assignment condition is not a constant to obtain a second new assignment condition.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-05-04 | 2001-11-03 | 2002-05-05 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-05-04 | 2005-11-03 | 2006-05-05 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-05-04 | 2009-11-03 | 2010-05-05 | $7700.00 | Window Closed / Lapsed |