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US5237513A Expired / Lapsed US ⏱️ 0.0 years remaining

Optimal integrated circuit generation

Assignee: KAPLAN JONATHAN T
•
Filing: 1990-04-18
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Granted: 1993-08-17
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Expires: 2010-04-18
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Abstract

Abstract An integrated circuit structure is generated to perform a given combinational logic function. A data processing system generates the integrated circuit structure when provided with an input specification of the function to be performed by the structure. The resulting integrated circuit structure is comprised of both restoring logic networks and pass logic networks. The structure is generated by initially representing the function in a number of multidimensional boolean spaces. Subsequently, these spaces are manipulated to generate the resulting pass and restoring logic networks.

Inventors

  • 👤 Jonathan T. Kaplan

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 10:47
CPC Classifications
G; G06; G06F; G06F30/00; G06F30/30; G06F30/32; G06F30/327

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 214 words
In a data processing system having at least one processor and a memory, a method for generating a schematic description of an integrated circuit, said circuit including both pass and restoring logic networks, comprising the processor performing the steps of: a) accepting inputs and corresponding outputs for a function to be performed by the integrated circuit; b) generating, and storing in memory, data structures comprised of multidimensional spaces for representing the inputs and the outputs and storing a representation of the inputs and the outputs in the data structures, said data structures including data structures that view the inputs as pass values and a data structure that views the inputs as only control variables; c) finding prime implicants of the representation held in data structures and using prime implicants of the representations held in the data structures that view the inputs as pass variables to represent pass logic networks, and using prime implicants from the data structures that view the inputs only as control variables to represent restoring logic networks; d) selecting certain of the pass and restoring logic prime implicants using an optimization procedure to generate a cover of the function; and e) producing the schematic description of the integrated circuit by generating pass and restoring logic networks for the selected prime implicants.
Claim 2
Dependent Claim 214 words
In a data processing system having at least one processor and a memory, a method for generating a schematic description of an integrated circuit, said circuit including both pass and restoring logic networks, comprising the processor performing the steps of: a) accepting inputs and corresponding outputs for a function to be performed by the integrated circuit; b) generating, and storing in memory, data structures comprised of multidimensional spaces for representing the inputs and the outputs and storing a representation of the inputs and the outputs in the data structures, said data structures including data structures that view the inputs as pass values and a data structure that views the inputs as only control variables; c) finding prime implicants of the representation held in data structures and using prime implicants of the representations held in the data structures that view the inputs as pass variables to represent pass logic networks, and using prime implicants from the data structures that view the inputs only as control variables to represent restoring logic networks; d) selecting certain of the pass and restoring logic prime implicants using an optimization procedure to generate a cover of the function; and e) producing the schematic description of the integrated circuit by generating pass and restoring logic networks for the selected prime implicants.
Claim 3
Dependent Claim 51 words
A data processing method as claimed in claim 1 wherein in the step of selecting, prime implicants that are in a data structure that view an input as a pass variable, and that do not span alternate values of the input viewed as a pass variable, are excluded from being selected.
Claim 4
Dependent Claim 19 words
A data processing method as recited in claim 1 wherein the data structures have a dimension for each input.
Claim 5
Dependent Claim 22 words
A data processing method as recited in claim 3 wherein the multidimensional spaces that comprise data structures have a plurality of vertices.
Claim 6
Dependent Claim 19 words
A data processing method as recited in claim 4 wherein coordinates of the vertices are values of the inputs.
Claim 7
Dependent Claim 42 words
A data processing method as recited in claim 4 wherein for the data structures that view the inputs only as control variables, each vertex has a value of an output of the function produced for inputs that comprise coordinates of the vertex.
Claim 8
Dependent Claim 60 words
A data processing method as recited in claim 4 wherein for each of the data structures that view an input as a pass variable, the vertices each have a value of one if the output of the function is equal to the input and a value of zero if the output of the function is not equal to the input.
Claim 9
Dependent Claim 21 words
A data processing method as recited in claim 1 wherein the inputs and outputs are provided in a truth table format.

References Cited (Backward Citations)

US4541067A Cited
US4566064A Cited
US4622648A Cited
US4591993A Cited
US4697241A Cited
US4709226A Cited
US4792909A Cited
US4916627A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1996-08-16 1997-02-15 1997-08-17 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2000-08-16 2001-02-15 2001-08-17 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2004-08-16 2005-02-15 2005-08-17 $7700.00 Window Closed / Lapsed

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