Patent US5740353A successfully refreshed from Google Patents.
US5740353A
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Method and apparatus for creating a multiprocessor verification environment
Assignee: International Business Machines Corp
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Filing: 1995-12-14
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Granted: 1998-04-14
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Expires: 2015-12-14
Abstract
Abstract A method and apparatus for creating a multiprocessor verification environment. A Multiprocessor Test Generator (MPTG) generates a set of test cases in a Multiprocessor Test Language (MTL) format subject to constraints and enumeration controls in a test specification. An abstract system model of the machine under test is inputted to the Multiprocessor Test Generator. The Multiprocessor Test Generator (MPTG) receives the test specification and abstract system model, accesses a system specific database and generates test cases based on the constraints in the test specification in a Multiprocessor Test Language (MTL). The Multiprocessor Test Language (MTL) test cases are inputted to a Multiprocessor Test Executive (MPX) which controls the issuance of the test cases to a cache-coherent multiprocessor system, and monitors their completion in order to verify operation of the cache-coherent multiprocessor system.
Inventors
- 👤 Jeffrey Thomas Kreulen
- 👤 Sriram Srinivasan Mandyam
- 👤 Brian Walter O'Krafka
- 👤 Shahram Salamian
- 👤 Ramanathan Raghavan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-02 07:31
CPC Classifications
G; G06; G06F; G06F11/00; G06F11/22; G06F11/26; G06F11/263; G06F12/00; G06F12/02; G06F12/08; G06F12/0802; G06F12/0806; G06F12/0815; G06F2212/00; G06F2212/10; G06F2212/1032
Claims Analysis
Total Claims: 28
Claim 1
Independent Claim
132 words
A method, implemented in a computer, for providing a multiprocessor verification testing environment for testing storage components, comprising: providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; preloading initialization information for said caches and main memories; generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; applying said test cases to a cache-coherent multiprocessor system having storage hierarchy mechanism to verify operation of said system; monitoring the completion of said test cases in said cache coherent multiprocessor system; and inputting data values for a subset of addresses in said caches and main memory.
Claim 2
Independent Claim
132 words
A method, implemented in a computer, for providing a multiprocessor verification testing environment for testing storage components, comprising: providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; preloading initialization information for said caches and main memories; generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; applying said test cases to a cache-coherent multiprocessor system having storage hierarchy mechanism to verify operation of said system; monitoring the completion of said test cases in said cache coherent multiprocessor system; and inputting data values for a subset of addresses in said caches and main memory.
Claim 3
Independent Claim
138 words
A method, implemented in a computer, for providing a multiprocessor verification testing environment for testing storage components, comprising: providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; preloading initialization information for said caches and main memories; generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; applying said test cases to a cache-coherent multiprocessor system having storage hierarchy mechanism to verify operation of said system; monitoring the completion of said test cases in said cache coherent multiprocessor system; and specifying constraints on the initialization and sequence of events at each of said plurality of caches in said test specification.
Claim 4
Independent Claim
138 words
A method, implemented in a computer, for providing a multiprocessor verification testing environment for testing storage components, comprising: providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; preloading initialization information for said caches and main memories; generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; applying said test cases to a cache-coherent multiprocessor system having storage hierarchy mechanism to verify operation of said system; monitoring the completion of said test cases in said cache coherent multiprocessor system; and specifying constraints on the initialization and sequence of events at each of said plurality of caches in said test specification.
Claim 5
Independent Claim
143 words
A method, implemented in a computer, for providing a multiprocessor verification testing environment for testing storage components, comprising: providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; preloading initialization information for said caches and main memories; generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; applying said test cases to a cache-coherent multiprocessor system having storage hierarchy mechanism to verify operation of said system; monitoring the completion of said test cases in said cache coherent multiprocessor system; and specifying controls enabling the enumeration of a specified number of variables in said test specification subject to the execution of a preceding number of constraints.
Claim 6
Independent Claim
143 words
A method, implemented in a computer, for providing a multiprocessor verification testing environment for testing storage components, comprising: providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; preloading initialization information for said caches and main memories; generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; applying said test cases to a cache-coherent multiprocessor system having storage hierarchy mechanism to verify operation of said system; monitoring the completion of said test cases in said cache coherent multiprocessor system; and specifying controls enabling the enumeration of a specified number of variables in said test specification subject to the execution of a preceding number of constraints.
Claim 7
Independent Claim
132 words
A method, implemented in a computer, for providing a multiprocessor verification testing environment for testing storage components, comprising: providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; preloading initialization information for said caches and main memories; generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; applying said test cases to a cache-coherent multiprocessor system having storage hierarchy mechanism to verify operation of said system; monitoring the completion of said test cases in said cache coherent multiprocessor system; and automatically generating said test specification of a machine model from a canonical protocol table.
Claim 8
Independent Claim
132 words
A method, implemented in a computer, for providing a multiprocessor verification testing environment for testing storage components, comprising: providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; preloading initialization information for said caches and main memories; generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; applying said test cases to a cache-coherent multiprocessor system having storage hierarchy mechanism to verify operation of said system; monitoring the completion of said test cases in said cache coherent multiprocessor system; and automatically generating said test specification of a machine model from a canonical protocol table.
Claim 9
Independent Claim
146 words
A method, implemented in a computer, for providing a multiprocessor verification testing environment for testing storage components, comprising: providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; preloading initialization information for said caches and main memories; generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; applying said test cases to a cache-coherent multiprocessor system having storage hierarchy mechanism to verify operation of said system; monitoring the completion of said test cases in said cache coherent multiprocessor system; and creating a machine model as an interconnected set of coherence elements having a plurality of processors as degenerate coherence elements that issue transactions without first receiving a transaction.
Claim 10
Independent Claim
146 words
A method, implemented in a computer, for providing a multiprocessor verification testing environment for testing storage components, comprising: providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; preloading initialization information for said caches and main memories; generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; applying said test cases to a cache-coherent multiprocessor system having storage hierarchy mechanism to verify operation of said system; monitoring the completion of said test cases in said cache coherent multiprocessor system; and creating a machine model as an interconnected set of coherence elements having a plurality of processors as degenerate coherence elements that issue transactions without first receiving a transaction.
Claim 11
Independent Claim
136 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and means for inputting data values for a subset of addresses in said caches and main memory.
Claim 12
Independent Claim
136 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and means for inputting data values for a subset of addresses in said caches and main memory.
Claim 13
Independent Claim
142 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and means for specifying constraints on the initialization and sequence of events at each of said plurality of caches in said test specification.
Claim 14
Independent Claim
142 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and means for specifying constraints on the initialization and sequence of events at each of said plurality of caches in said test specification.
Claim 15
Independent Claim
147 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and means for specifying controls enabling the enumeration of a specified number of variables in said test specification subject to the execution of a preceding number of constraints.
Claim 16
Independent Claim
147 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and means for specifying controls enabling the enumeration of a specified number of variables in said test specification subject to the execution of a preceding number of constraints.
Claim 17
Independent Claim
140 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and wherein said cache-coherent multiprocessor system includes a hardware simulation model having a subset of storage hierarchy components within said system.
Claim 18
Independent Claim
140 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and wherein said cache-coherent multiprocessor system includes a hardware simulation model having a subset of storage hierarchy components within said system.
Claim 19
Independent Claim
136 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and wherein said test cases are issued to said cache coherent multiprocessor system in a one-to-one mapping.
Claim 20
Independent Claim
136 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and wherein said test cases are issued to said cache coherent multiprocessor system in a one-to-one mapping.
Claim 21
Independent Claim
136 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and means for automatically generating said test specification of a machine model from a canonical protocol table.
Claim 22
Independent Claim
136 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and means for automatically generating said test specification of a machine model from a canonical protocol table.
Claim 23
Independent Claim
151 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and means for creating a machine model as an interconnected set of coherence elements having a plurality of processors as degenerate coherence elements that issue transactions without receiving first receiving a transaction.
Claim 24
Independent Claim
151 words
An apparatus for providing a multiprocessor verification testing environment for testing storage components in a data processing system, comprising: means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; means for preloading initialization information for said caches and main memories; means for generating a set of test cases for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification; means for receiving said test cases and controlling the issuance of said test cases to said cache-coherent multiprocessor system to verify operation of said cache-coherent multiprocessor system; and means for creating a machine model as an interconnected set of coherence elements having a plurality of processors as degenerate coherence elements that issue transactions without receiving first receiving a transaction.
Claim 25
Dependent Claim
125 words
A computer program product having a computer readable medium having computer program logic recorded thereon for providing a multiprocessor verification testing environment for testing storage components, comprising: computer readable means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; computer readable means for preloading initialization information for said caches and main memories; and computer readable means for generating a set of tests for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification, and computer readable means for inputting data values for a subset of addresses in said caches and main memory.
Claim 26
Dependent Claim
125 words
A computer program product having a computer readable medium having computer program logic recorded thereon for providing a multiprocessor verification testing environment for testing storage components, comprising: computer readable means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; computer readable means for preloading initialization information for said caches and main memories; and computer readable means for generating a set of tests for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification, and computer readable means for inputting data values for a subset of addresses in said caches and main memory.
Claim 27
Dependent Claim
131 words
A computer program product having a computer readable medium having computer program logic recorded thereon for providing a multiprocessor verification testing environment for testing storage components, comprising: computer readable means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; computer readable means for preloading initialization information for said caches and main memories; and computer readable means for generating a set of tests for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification, and computer readable means for specifying constraints on the initialization and sequence of events at each of said plurality of caches in said test specification.
Claim 28
Dependent Claim
131 words
A computer program product having a computer readable medium having computer program logic recorded thereon for providing a multiprocessor verification testing environment for testing storage components, comprising: computer readable means for providing a test specification of a cache coherence multiprocessor configuration having a plurality of caches and main memories to be tested in said multiprocessor verification testing environment; computer readable means for preloading initialization information for said caches and main memories; and computer readable means for generating a set of tests for exercising all transaction types and cache states for said caches and main memories in said cache coherence multiprocessor configuration based on said test specification, and computer readable means for specifying constraints on the initialization and sequence of events at each of said plurality of caches in said test specification.
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USPTO Annuity & Maintenance Windows
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