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US5717628A Expired / Lapsed US ⏱️ 0.0 years remaining

Nitride cap formation in a DRAM trench capacitor

Assignee: Infineon Technologies AG
•
Filing: 1996-03-04
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Granted: 1998-02-10
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Expires: 2016-03-04
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Abstract

Abstract A method for forming an oxygen-impervious barrier on the oxide collar of a trench capacitor in a DRAM cell. The process consists of etching a shallow trench into the oxide collar which surrounds the polysilicon trench fill and isolating it from the single crystal semiconducting substrate material of the DRAM cell to a depth which is at least equal to or larger than the width of the oxide collar. A nitride layer with a thickness equal to or thicker than half of the width of the oxide collar is then deposited on the top surface of the freshly excavated oxide collar such that the aforementioned trench is completely filled with this nitride layer, and the entire surfaces of the substrate and polysilicon trench fill are completely covered. The newly formed nitride layer is then selectively overetched in order to completely remove it from the substrate and polysilicon trench fill surfaces, while still maintaining a sufficient thickness of this layer disposed on the oxide collar sufficient to prevent oxygen diffusion into the oxide collar. Alternatively, the nitride layer may be deposited as a thin layer sandwiched between the original oxide collar and an additional thermally deposited oxide layer.

Inventors

  • 👤 Erwin Hammerl
  • 👤 Herb Lei Ho

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-06 10:03
CPC Classifications
H; H10; H10B; H10B12/00; H10B12/01; H10B12/02; H10B12/03; H10B12/038

Claims Analysis

Total Claims: 7
Claim 1
Independent Claim 102 words
A DRAM cell of a type including a semiconductor substrate of a first conductivity and a trench formed in said substrate, said trench being filled with a semiconducting material of a second conductivity, a plurality of functional elements formed on and in said semiconductor substrate, and an isolating collar for isolating said functional elements, said isolating collar disposed within said trench and encircling said semiconducting material of said second conductivity; the improvement therewith comprising: oxygen barrier means disposed within said trench and on said isolating collar for preventing the diffusion of oxygen from the surface of said substrate into said isolating collar.
Claim 2
Dependent Claim 102 words
A DRAM cell of a type including a semiconductor substrate of a first conductivity and a trench formed in said substrate, said trench being filled with a semiconducting material of a second conductivity, a plurality of functional elements formed on and in said semiconductor substrate, and an isolating collar for isolating said functional elements, said isolating collar disposed within said trench and encircling said semiconducting material of said second conductivity; the improvement therewith comprising: oxygen barrier means disposed within said trench and on said isolating collar for preventing the diffusion of oxygen from the surface of said substrate into said isolating collar.
Claim 3
Dependent Claim 15 words
The DRAM cell according to claim 1, wherein said isolating collar is an oxide collar.
Claim 4
Dependent Claim 23 words
The DRAM cell according to claim 2, wherein said oxygen barrier means disposed on said oxide collar comprises a layer of silicon nitride.
Claim 5
Dependent Claim 17 words
The DRAM cell according to claim 3, wherein the thickness of said silicon nitride is 10-20 nm.
Claim 6
Dependent Claim 24 words
The DRAM cell according to claim 1, wherein the deposition of said oxygen barrier means results in a dramatic reduction in vertical parasitic leakage.
Claim 7
Dependent Claim 37 words
The DRAM cell according to claim 1, wherein said improvement further comprises: an oxide layer disposed between said isolating collar and said oxygen barrier means, said oxide layer operating to minimize stress build-up in said semiconductor substrate.

References Cited (Backward Citations)

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USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2001-02-09 2001-08-11 2002-02-10 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2005-02-09 2005-08-11 2006-02-10 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2009-02-09 2009-08-11 2010-02-10 $7700.00 Window Closed / Lapsed

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