Patent US5714786A successfully refreshed from Google Patents.
US5714786A
Expired / Lapsed
US
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Transistors having controlled conductive spacers, uses of such transistors and methods of making such transistors
Assignee: Micron Technology Inc
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Filing: 1996-10-31
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Granted: 1998-02-03
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Expires: 2016-10-31
Abstract
Abstract An improved transistor structure includes an insulated conductive gate spacer which is contacted and driven separately from the gate of the transistor. The gate spacer serves as a control or second gate for the transistor and may be used throughout an integrated circuit or it may be preferred to use the improved transistor only in critical speed paths of an integrated circuit. Delays within circuits including the improved transistor are reduced since the drain voltage can be higher than VCC and the BVDSS and subthreshold voltage are substantially higher than standard LDD transistors. When the improved transistor is used selectively within an integrated circuit, the remaining devices can be structured as standard LDD transistors using the gate spacers in a conventional manner.
Inventors
- 👤 Fernando Gonzalez
- 👤 David Kao
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 03:46
CPC Classifications
H; H10; H10B; H10B12/00; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/023; H10D30/60; H10D30/611; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01326; H10D64/01328; H10D64/60; H10D64/66; H10D64/671; H10D84/00; H10D84/01; H10D84/0123; H10D84/0126; H10D84/0147; H10D84/02; H10D84/03; H10D84/038; H10D84/80; H10D84/82; H10D84/83; H10D84/8316; H10D64/01324
Claims Analysis
Total Claims: 23
Claim 1
Independent Claim
78 words
A transistor structure comprising: a gate structure formed on a first oxide layer on a silicon structure; a secondary oxide layer formed on said gate structure; a conductive spacer formed around said gate structure on said secondary oxide layer, said conductive spacer including an aperture over a portion of said gate structure; a first contact to said gate structure through said portion of said gate structure corresponding to said aperture; and a second contact to said conductive spacer.
Claim 2
Dependent Claim
78 words
A transistor structure comprising: a gate structure formed on a first oxide layer on a silicon structure; a secondary oxide layer formed on said gate structure; a conductive spacer formed around said gate structure on said secondary oxide layer, said conductive spacer including an aperture over a portion of said gate structure; a first contact to said gate structure through said portion of said gate structure corresponding to said aperture; and a second contact to said conductive spacer.
Claim 3
Dependent Claim
54 words
A transistor structure as claimed in claim 1 wherein said gate structure comprises a gate and a conductive spacer connection support separated from said gate wherein said portion of said gate structure corresponding to said aperture is a portion of said gate, and said second contact is made at said conductive spacer connection support.
Claim 4
Dependent Claim
14 words
A transistor structure as claimed in 1 wherein said gate structure comprises a wordline.
Claim 5
Dependent Claim
15 words
A transistor structure as claimed in 1 wherein said gate structure comprises a multilayer structure.
Claim 6
Dependent Claim
90 words
A dual gate transistor structure comprising: a gate structure formed on a first oxide layer on a silicon structure and defining a first gate; a secondary oxide layer formed over said gate structure; a conductive spacer formed around said gate structure on said secondary oxide layer, said conductive spacer defining a second gate and including an aperture over a portion of said gate structure; a first contact to said first gate through said portion of said gate structure corresponding to said aperture; and a second contact to said conductive spacer.
Claim 7
Dependent Claim
90 words
A dual gate transistor structure comprising: a gate structure formed on a first oxide layer on a silicon structure and defining a first gate; a secondary oxide layer formed over said gate structure; a conductive spacer formed around said gate structure on said secondary oxide layer, said conductive spacer defining a second gate and including an aperture over a portion of said gate structure; a first contact to said first gate through said portion of said gate structure corresponding to said aperture; and a second contact to said conductive spacer.
Claim 8
Dependent Claim
100 words
A transistor structure comprising: an actual gate and a pseudo gate formed on a first oxide layer on a silicon structure, said actual and pseudo gates being separated from one another; a secondary oxide layer formed over said actual and pseudo gates; a conductive spacer formed around said actual and pseudo gates on said secondary oxide layer, said conductive spacer including an aperture over a portion of said actual gate; a first contact to said actual gate through said portion of said actual gate corresponding to said aperture; and a second contact to said conductive spacer at said pseudo gate.
Claim 9
Dependent Claim
100 words
A transistor structure comprising: an actual gate and a pseudo gate formed on a first oxide layer on a silicon structure, said actual and pseudo gates being separated from one another; a secondary oxide layer formed over said actual and pseudo gates; a conductive spacer formed around said actual and pseudo gates on said secondary oxide layer, said conductive spacer including an aperture over a portion of said actual gate; a first contact to said actual gate through said portion of said actual gate corresponding to said aperture; and a second contact to said conductive spacer at said pseudo gate.
Claim 10
Independent Claim
89 words
A method of making a transistor structure comprising the steps of: forming a gate structure on a first oxide layer on a silicon structure; forming a secondary oxide layer on said gate structure; forming a conductive spacer around said gate structure on said secondary oxide layer; removing said conductive spacer from a portion of said gate structure; forming a first contact to said gate structure through said portion of said gate structure from which said conductive spacer has been removed; and forming a second contact to said conductive spacer.
Claim 11
Independent Claim
89 words
A method of making a transistor structure comprising the steps of: forming a gate structure on a first oxide layer on a silicon structure; forming a secondary oxide layer on said gate structure; forming a conductive spacer around said gate structure on said secondary oxide layer; removing said conductive spacer from a portion of said gate structure; forming a first contact to said gate structure through said portion of said gate structure from which said conductive spacer has been removed; and forming a second contact to said conductive spacer.
Claim 12
Independent Claim
122 words
A method of making a transistor structure comprising the steps of: forming a gate on a first oxide layer on a silicon structure; forming a conductive spacer connection support on said first oxide layer on said silicon structure but separated from said gate; forming a secondary oxide layer on said gate and said conductive spacer connection support; forming a conductive spacer around said gate and said conductive spacer connection support on said secondary oxide layer; removing said conductive spacer from a portion of said gate; forming a first contact to said gate through said portion of said gate structure from which said conductive spacer has been removed; and forming a second contact to said conductive spacer at said conductive spacer connection support.
Claim 13
Independent Claim
122 words
A method of making a transistor structure comprising the steps of: forming a gate on a first oxide layer on a silicon structure; forming a conductive spacer connection support on said first oxide layer on said silicon structure but separated from said gate; forming a secondary oxide layer on said gate and said conductive spacer connection support; forming a conductive spacer around said gate and said conductive spacer connection support on said secondary oxide layer; removing said conductive spacer from a portion of said gate; forming a first contact to said gate through said portion of said gate structure from which said conductive spacer has been removed; and forming a second contact to said conductive spacer at said conductive spacer connection support.
Claim 14
Independent Claim
101 words
A method of making a dual gate transistor structure comprising the steps of: forming a gate structure on a first oxide layer on a silicon structure to define a first gate; forming a secondary oxide layer over said gate structure; forming a conductive spacer around said gate structure on said secondary oxide layer to define a second gate; removing said conductive spacer from a portion of said gate structure; forming a first contact to said first gate through said portion of said gate structure from which said conductive spacer has been removed; and forming a second contact to said conductive spacer.
Claim 15
Independent Claim
101 words
A method of making a dual gate transistor structure comprising the steps of: forming a gate structure on a first oxide layer on a silicon structure to define a first gate; forming a secondary oxide layer over said gate structure; forming a conductive spacer around said gate structure on said secondary oxide layer to define a second gate; removing said conductive spacer from a portion of said gate structure; forming a first contact to said first gate through said portion of said gate structure from which said conductive spacer has been removed; and forming a second contact to said conductive spacer.
Claim 16
Independent Claim
114 words
A method of making a transistor structure comprising the steps of: forming an actual gate on a first oxide layer on a silicon structure; forming a pseudo gate on said first oxide layer on said silicon structure; forming a secondary oxide layer over said actual gate and said pseudo gate; forming a conductive spacer around said actual gate and said pseudo gate on said secondary oxide layer; removing said conductive spacer from a portion of said actual gate; forming a first contact to said actual gate through said portion of said actual gate from which said conductive spacer has been removed; and forming a second contact to said conductive spacer at said pseudo gate.
Claim 17
Independent Claim
114 words
A method of making a transistor structure comprising the steps of: forming an actual gate on a first oxide layer on a silicon structure; forming a pseudo gate on said first oxide layer on said silicon structure; forming a secondary oxide layer over said actual gate and said pseudo gate; forming a conductive spacer around said actual gate and said pseudo gate on said secondary oxide layer; removing said conductive spacer from a portion of said actual gate; forming a first contact to said actual gate through said portion of said actual gate from which said conductive spacer has been removed; and forming a second contact to said conductive spacer at said pseudo gate.
Claim 18
Dependent Claim
115 words
An integrated circuit structure comprising: a first plurality of conventional LDD transistors; and a second plurality of transistors each comprising: a gate structure formed on a first oxide layer on a silicon structure; a secondary oxide layer formed on said gate structure; a conductive spacer formed around said gate structure on said secondary oxide layer, said conductive spacer including an aperture over a portion of said gate structure; a first contact to said gate structure through said portion of said gate structure corresponding to said aperture; and a second contact to said conductive spacer, said first plurality of conventional LDD transistors and said second plurality of transistors being interconnected to form said integrated circuit structure.
Claim 19
Dependent Claim
115 words
An integrated circuit structure comprising: a first plurality of conventional LDD transistors; and a second plurality of transistors each comprising: a gate structure formed on a first oxide layer on a silicon structure; a secondary oxide layer formed on said gate structure; a conductive spacer formed around said gate structure on said secondary oxide layer, said conductive spacer including an aperture over a portion of said gate structure; a first contact to said gate structure through said portion of said gate structure corresponding to said aperture; and a second contact to said conductive spacer, said first plurality of conventional LDD transistors and said second plurality of transistors being interconnected to form said integrated circuit structure.
Claim 20
Dependent Claim
18 words
An integrated circuit structure as claimed in claim 11 wherein said integrated circuit structure is an array device.
Claim 21
Dependent Claim
18 words
An integrated circuit structure as claimed in claim 11 wherein said integrated circuit structure is a storage device.
Claim 22
Independent Claim
130 words
A method of making an integrated circuit structure comprising the steps of: forming gate structures on a first oxide layer on a silicon structure; forming a secondary oxide layer on said gate structures; forming conductive spacers around said gate structures; utilizing said conductive spacers to form LDD transistor structures associated with a first number of said gate structures; utilizing said conductive spacers to form transistor structures associated with a second number of said gate structures by performing the steps of: removing said conductive spacer from portions of said second number of said gate structures; forming first contacts to said second number of gate structures through said portions of said second number of gate structures from which said conductive spacer has been removed; and forming second contacts to said conductive spacers.
Claim 23
Independent Claim
130 words
A method of making an integrated circuit structure comprising the steps of: forming gate structures on a first oxide layer on a silicon structure; forming a secondary oxide layer on said gate structures; forming conductive spacers around said gate structures; utilizing said conductive spacers to form LDD transistor structures associated with a first number of said gate structures; utilizing said conductive spacers to form transistor structures associated with a second number of said gate structures by performing the steps of: removing said conductive spacer from portions of said second number of said gate structures; forming first contacts to said second number of gate structures through said portions of said second number of gate structures from which said conductive spacer has been removed; and forming second contacts to said conductive spacers.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2001-02-02 | 2001-08-04 | 2002-02-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2005-02-02 | 2005-08-04 | 2006-02-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2009-02-02 | 2009-08-04 | 2010-02-03 | $7700.00 | Window Closed / Lapsed |