Method for manufacturing an insulating trench in an SOI substrate for smartpower technologies

Claim 1

Method for producing an insulation trench in a SOI substrate having integrated logic components and high-voltage power components, said method comprising the steps of: providing an SOI substrate with a monocrystalline silicon wafer, an insulating layer of SiO 2 oriented thereon, and a monocrystalline silicon layer oriented on said insulating layer; producing a trench mask on a surface of said silicon layer, said trench mask comprising SiO 2 at least at said surface of said silicon layer, and etching, by selective etching relative to SiO 2 , a trench in said silicon layer extending to said insulating layer using said trench mask; producing a doped silicon structure from amorphous silicon that at least covers sidewalls of said trench; depositing said doped silicon structure by selective silicon deposition at perpendicular sidewalls of said monocrystalline layer that form said sidewalls of said trench; producing diffusion regions neighboring said trench in said monocrystalline silicon layer by drive-out of dopant from said doped silicon structure in an oxidizing atmosphere; and producing an insulation structure in said trench by oxidation of said doped silicon structure so that said oxidation of said doped silicon structure so that said oxidation of said doped silicon structure occurs simultaneously with said drive-out of dopant.