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US5684419A
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US
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n-bit analog-to-digital converter with n-1 magnitude amplifiers and n comparators
Assignee: Analog Devices Inc
•
Filing: 1994-12-01
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Granted: 1997-11-04
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Expires: 2014-12-01
Abstract
Abstract A serial-type A/D converter uses magnitude amplifiers("magamps") and comparators for effecting the conversion of analog signals to Gray scale code signals that are then converted to binary digital signals by a Gray scale code-to-binary portion of the serial-type A/D converter. More specifically, a serial-type A/D converter uses an n-bit converter that has n-1 magamps and n-comparators. The n-1 magamps are cascaded such that the V OL and V OH outputs of a stage are the inputs to the next stage. The output of the comparators are input to the Gray scale code-to-binary portion of the serial A/D converter. The latching of the comparators occurs outside of the magamps. This allows for the parallel latching of the n comparators. The speed of the serial-type A/D converter is determined by the bandwidth of the magamps. The serial-type A/D converter includes an offset method that significantly reduces the effects of early voltage, V A , on the output waveforms. Each stage of the serial-type A/D converter may have any desired gain and not limited to a particular gain.
Inventors
- 👤 Frank Murden
- 👤 Carl W. Moreland
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 15:40
CPC Classifications
H; H03; H03F; H03F3/00; H03F3/26; H03F3/45; H03F3/45071; H03F3/45076; H03F3/4508; H03F3/45098; H03F3/45103; H03F3/45107; H03M; H03M1/00; H03M1/12; H03M1/34; H03M1/38; H03M1/44; H03M1/445; H03F2203/00; H03F2203/45; H03F2203/45302; H03F2203/45311; H03F2203/45318; H03F2203/45352; H03F2203/45371; H03F2203/45702; H03F2203/45722
Claims Analysis
Total Claims: 89
Claim 1
Independent Claim
250 words
A magnitude amplifier (magamp) for receiving a differential analog input and for providing an amplified signal at a first output and a second output, the magamp comprising: a differential input circuit for receiving and amplifying the differential analog input; a current switching circuit, coupled to the differential input circuit, for folding the differential analog input at a predetermined relationship between first and second signals of the differential analog input to provide a First folded signal and a second folded signal; a comparator for receiving the differential analog input and generating first and second control signals for controlling the current switching circuit; first output means that connects to the current switching circuit, the first output means receiving the first folded signal and providing a first output signal to the first output and including means for isolating the first folded signal from the first output; second output means that connects to the current switching circuit, the second output means receiving the second folded signal and providing a second output signal to the second output and including means for isolating the second folded signal from the second output; and alignment means coupled between the isolating means of at least one of the first and second output means and a respective at least one of the first and second outputs for aligning the output signals of the first and second output means such that a magnitude of one of the first and second folded signals is changed relative to a magnitude of the other.
Claim 2
Dependent Claim
250 words
A magnitude amplifier (magamp) for receiving a differential analog input and for providing an amplified signal at a first output and a second output, the magamp comprising: a differential input circuit for receiving and amplifying the differential analog input; a current switching circuit, coupled to the differential input circuit, for folding the differential analog input at a predetermined relationship between first and second signals of the differential analog input to provide a First folded signal and a second folded signal; a comparator for receiving the differential analog input and generating first and second control signals for controlling the current switching circuit; first output means that connects to the current switching circuit, the first output means receiving the first folded signal and providing a first output signal to the first output and including means for isolating the first folded signal from the first output; second output means that connects to the current switching circuit, the second output means receiving the second folded signal and providing a second output signal to the second output and including means for isolating the second folded signal from the second output; and alignment means coupled between the isolating means of at least one of the first and second output means and a respective at least one of the first and second outputs for aligning the output signals of the first and second output means such that a magnitude of one of the first and second folded signals is changed relative to a magnitude of the other.
Claim 3
Dependent Claim
21 words
The amplifier as recited in claim 1, wherein the differential input circuit includes a differential amplifier with first and second branches.
Claim 4
Dependent Claim
47 words
The amplifier as recited in claim 2, wherein the first branch has a first input transistor for receiving the first signal of the differential analog input, a first current source connected to the first input transistor, and a first load resistor connected to the current switching circuit.
Claim 5
Dependent Claim
17 words
The amplifier as recited in claim 3, wherein the first input transistor is a bipolar npn transistor.
Claim 6
Dependent Claim
47 words
The amplifier as recited in claim 3, wherein the second branch has a second input transistor for receiving the second signal of the differential analog input, a second current source connected to the second input transistor, and a second load resistor connected to the current switching circuit.
Claim 7
Dependent Claim
17 words
The amplifier as recited in claim 5, wherein the second input transistor is a bipolar npn transistor.
Claim 8
Dependent Claim
51 words
The amplifier as recited in claim 5, wherein the current switching circuit includes first, second, third, and fourth switching transistors, the first and second switching transistors forming a first portion of the current switching circuit and the third and fourth switching transistors forming a second portion of the current switching circuit.
Claim 9
Dependent Claim
20 words
The amplifier as recited in claim 7, wherein the first, second, third, and fourth switching transistors are bipolar npn transistors.
Claim 10
Dependent Claim
75 words
The amplifier as recited in claim 7, wherein first terminals of the first and fourth switching transistors are connected to receive the first control signal from the comparator, second terminals of the first and second switching transistors are connected to the first input transistor, a third terminal of the first switching transistor is connected to the first load resistor, and a third terminal of the second switching transistor is connected to the second load resistor.
Claim 11
Dependent Claim
30 words
The amplifier as recited in claim 9, wherein the first output means connects to a node between the third terminal of the first switching transistor and the first load resistor.
Claim 12
Dependent Claim
58 words
The amplifier as recited in claim 10, wherein the isolating means of the first output means includes an output transistor having an enabling terminal connected to the node, and an output current source connected to a first terminal of the output transistor, the first output of the magamp being connected to the first terminal of the output transistor.
Claim 13
Dependent Claim
75 words
The amplifier as recited in claim 9, wherein first terminals of the second and third switching transistors are connected to receive the second control signal from the comparator, second terminals of the third and fourth switching transistors are connected to the second input transistor, a third terminal of the third switching transistor is connected to the first load resistor, and a third terminal of the fourth switching transistor is connected to the second load resistor.
Claim 14
Dependent Claim
30 words
The amplifier as recited in claim 12, wherein the second output mean connects to a node between the third terminal of the fourth switching transistor and the second load resistor.
Claim 15
Dependent Claim
113 words
The amplifier as recited in claim 13, wherein the isolating means of the first output means includes a first output transistor having an enabling terminal connected to the first branch, and a first output current source connected to a first terminal of the first output transistor, the first output being connected to the first terminal of the first output transistor, and wherein the isolating means of the second output means includes a second output transistor having an enabling terminal connected to the second branch, a second output current source connected to a first terminal of the second output transistor, the second output being connected to the first terminal of the second output transistor.
Claim 16
Dependent Claim
229 words
A magnitude amplifier (magamp) for receiving a differential analog input and for providing an amplified signal at a first output and a second output, the magamp comprising: a first unit including: a first differential input circuit for receiving and amplifying the differential analog input, a current switching circuit, coupled to the first differential input circuit, for folding the differential analog input at a predetermined relationship between first and second signals of the differential analog input and for providing first and second folded signals, a comparator for receiving the differential analog input and for generating first and second control signals based on a comparison of the first and second signals of the differential analog input, the first and second control signals controlling the current switching circuit, and first and second output means connected to the current switching circuit for receiving the first and second folded signals, respectively, and for providing first and second output signals; and a second unit including: a second differential input circuit for receiving and amplifying a differential reference signal and for providing an offset current to the first unit to align the first and second folded signals such that a magnitude of one of the first and second folded signals is altered relative to the other, and third and fourth output means connected to the second differential input circuit for providing third and fourth output signals.
Claim 17
Dependent Claim
229 words
A magnitude amplifier (magamp) for receiving a differential analog input and for providing an amplified signal at a first output and a second output, the magamp comprising: a first unit including: a first differential input circuit for receiving and amplifying the differential analog input, a current switching circuit, coupled to the first differential input circuit, for folding the differential analog input at a predetermined relationship between first and second signals of the differential analog input and for providing first and second folded signals, a comparator for receiving the differential analog input and for generating first and second control signals based on a comparison of the first and second signals of the differential analog input, the first and second control signals controlling the current switching circuit, and first and second output means connected to the current switching circuit for receiving the first and second folded signals, respectively, and for providing first and second output signals; and a second unit including: a second differential input circuit for receiving and amplifying a differential reference signal and for providing an offset current to the first unit to align the first and second folded signals such that a magnitude of one of the first and second folded signals is altered relative to the other, and third and fourth output means connected to the second differential input circuit for providing third and fourth output signals.
Claim 18
Dependent Claim
23 words
The amplifier as recited in claim 15, wherein the first differential input circuit includes a first differential amplifier with first and second branches.
Claim 19
Dependent Claim
52 words
The amplifier as recited in claim 16, wherein the first branch of the first differential amplifier has a first input transistor for receiving the first signal of the differential analog input, and a first current source, the amplifier further including at least a second current source connected to the current switching circuit.
Claim 20
Dependent Claim
17 words
The amplifier as recited in claim 17, wherein the first input transistor is a bipolar npn transistor.
Claim 21
Dependent Claim
52 words
The amplifier as recited in claim 17, wherein the second branch of the first differential amplifier has a second input transistor for receiving the second signal of the differential analog input, and a third current source, the amplifier further including at least a fourth current source connected to the current switching current.
Claim 22
Dependent Claim
17 words
The amplifier as recited in claim 19, wherein the second input transistor is a bipolar npn transistor.
Claim 23
Dependent Claim
51 words
The amplifier as recited in claim 19, wherein the current switching circuit includes first, second, third, and fourth switching transistors, the first and second switching transistors forming a first portion of the current switching circuit and the third and fourth switching transistors forming a second portion of the current switching circuit.
Claim 24
Dependent Claim
20 words
The amplifier as recited in claim 21, wherein the first, second, third, and fourth switching transistors are bipolar npn transistors.
Claim 25
Dependent Claim
75 words
The amplifier as recited in claim 21, wherein first terminals of the first and fourth switching transistors are connected to receive the first control signal from the comparator, second terminals of the first and second switching transistors are connected to the first input transistor, a third terminal of the first switching transistor is connected to the second current source, and a third terminal of the second switching transistor is connected to the fourth current source.
Claim 26
Dependent Claim
31 words
The amplifier as recited in claim 23, wherein the first output means connects to a first node between the third terminal of the first switching transistor and the second current source.
Claim 27
Dependent Claim
38 words
The amplifier as recited in claim 24, wherein the first output means includes a first inverted cascode transistor circuit that is connected to the first node, with the first inverted cascode transistor circuit including a first load resistor.
Claim 28
Dependent Claim
47 words
The amplifier as recited in claim 25, wherein the first inverted cascode transistor circuit includes a first cascode transistor with a first terminal connected to an enabling/disabling power source, a second terminal connected to the first node, and a third terminal connected to the first load resistor.
Claim 29
Dependent Claim
16 words
The amplifier as recited in claim 26, wherein the first cascode transistor is a pnp transistor.
Claim 30
Dependent Claim
75 words
The amplifier as recited in claim 23, wherein first terminals of the second and third switching transistors are connected to receive the second control signal from the comparator, second terminals of the third and fourth switching transistors are connected to the second input transistor, a third terminal of the third switching transistor is connected to the second current source, and a third terminal of the fourth switching transistor is connected to the fourth current source.
Claim 31
Dependent Claim
79 words
The amplifier as recited in claim 28, wherein the first output means connects to a first node of the first differential amplifier between the third terminal of the first switching transistor and the second current source in the first branch of the first differential amplifier, and wherein the second output means connects to a second node between the third terminal of the fourth switching transistor and the fourth current source in the second branch of the first differential amplifier.
Claim 32
Dependent Claim
70 words
The amplifier as recited in claim 29, wherein the first output means includes a first inverted cascode transistor circuit that is connected to the first node with the first inverted cascode transistor circuit including a first load resistor, and wherein the second output means includes a second inverted cascode transistor circuit that is connected to the second node with the second inverted cascode transistor circuit including a second load resistor.
Claim 33
Dependent Claim
88 words
The amplifier as retired in claim 30, wherein the first inverted cascode transistor circuit includes a first cascode transistor with a first terminal connected to an enabling/disabling power source, a second terminal connected to the first node, and a third terminal connected to the first load resistor, and wherein the second inverted cascode transistor circuit includes a second cascode transistor with a first terminal connected to the enabling/disabling power source, a second terminal connected to the second node, and a third terminal connected to the second load resistor.
Claim 34
Dependent Claim
17 words
The amplifier as recited in claim 31, wherein the first and second cascode transistors are pnp transistors.
Claim 35
Dependent Claim
33 words
The amplifier as recited in claim 31, wherein the second differential input circuit includes a second differential amplifier with first and second branches, and a third differential amplifier with first and second branches.
Claim 36
Dependent Claim
40 words
The amplifier as recited in claim 33, wherein the first branch of the second differential amplifier includes a third input transistor for receiving a first signal of the differential reference signal, a fifth current source, and a sixth current source.
Claim 37
Dependent Claim
17 words
The amplifier as recited in claim 34, wherein the third input transistor is a bipolar npn transistor.
Claim 38
Dependent Claim
40 words
The amplifier as recited in claim 34, wherein the second branch of the second differential amplifier includes a fourth input transistor for receiving a second signal of the differential reference signal, a seventh current source, and an eighth current source.
Claim 39
Dependent Claim
17 words
The amplifier as recited in claim 36, wherein the fourth input transistor is a bipolar npn transistor.
Claim 40
Dependent Claim
41 words
The amplifier as recited in claim 36, wherein the third output means includes a third inverted cascode transistor circuit with a third load resistor, the third inverted cascode transistor circuit being connected to the first branch of the second differential amplifier.
Claim 41
Dependent Claim
52 words
The amplifier as recited in claim 38, wherein the third inverted cascode transistor circuit includes a third cascode transistor with a first terminal connected to the enabling/disabling power source, a second terminal connected to the first branch of the second differential amplifier, and a third terminal connected to the third load resistor.
Claim 42
Dependent Claim
16 words
The amplifier as recited in claim 39, wherein the third cascode transistor is a pnp transistor.
Claim 43
Dependent Claim
41 words
The amplifier as recited in claim 38, wherein the fourth output means includes a fourth inverted cascode transistor circuit with a fourth load resistor, the fourth inverted cascode transistor circuit being connected to the second branch of the second differential amplifier.
Claim 44
Dependent Claim
98 words
The amplifier as recited in claim 41, wherein the third inverted cascode transistor circuit includes a third cascode transistor with a first terminal connected to the enabling/disabling power source a second terminal connected to the first branch of the second differential amplifier, and a third terminal connected to the third load resistor, and wherein the fourth inverted cascode transistor circuit includes a fourth cascode transistor with a first terminal connected to the enabling/disabling power source, a second terminal connected to the second branch of the second differential amplifier, and a third terminal connected to the fourth load resistor.
Claim 45
Dependent Claim
16 words
The amplifier as recited in claim 42, wherein the fourth cascode transistor is a pnp transistor.
Claim 46
Dependent Claim
56 words
The amplifier as recited in claim 42, wherein the first branch of the third differential amplifier includes a fifth input transistor for receiving the first signal of the differential reference signal, a ninth current source, and means for connecting the first branch of the third differential amplifier to the second branch of the first differential amplifier.
Claim 47
Dependent Claim
17 words
The amplifier as recited in claim 44, wherein the fifth input transistor is a bipolar npn transistor.
Claim 48
Dependent Claim
56 words
The amplifier as recited in claim 44, wherein the second branch of the third differential amplifier includes a sixth input transistor for receiving the second signal of the differential reference signal, a tenth current source, and means for connecting the second branch of the third differential amplifier to the first branch of the first differential amplifier.
Claim 49
Dependent Claim
17 words
The amplifier as recited in claim 46, wherein the sixth input transistor is a bipolar npn transistor.
Claim 50
Dependent Claim
33 words
The amplifier as recited in claim 15, wherein the second differential input circuit includes a first differential amplifier with first and second branches, and a second differential amplifier with first and second branches.
Claim 51
Dependent Claim
40 words
The amplifier as recited in claim 48, wherein the first branch of the first differential amplifier includes a first input transistor for receiving a first signal of the differential reference signal, a first current source, and a second current source.
Claim 52
Dependent Claim
40 words
The amplifier as recited in claim 49, wherein the second branch of the first differential amplifier includes a second input transistor for receiving a second signal of the differential reference signal, a third current source, and a fourth current source.
Claim 53
Dependent Claim
40 words
The amplifier as recited in claim 50, wherein the third output means includes a first inverted cascode transistor circuit with a first load resistor, the first inverted cascode transistor circuit being connected to the first branch of the differential amplifier.
Claim 54
Dependent Claim
47 words
The amplifier as recited in claim 51, wherein the first inverted cascode transistor circuit includes a first cascode transistor with a first control terminal, a second terminal connected to the first branch of the first differential amplifier, and a third terminal connected to the first load resistor.
Claim 55
Dependent Claim
41 words
The amplifier as recited in claim 51, wherein the fourth output means includes a second inverted cascode transistor circuit with a second load resistor, the second inverted cascode transistor circuit being connected to the second branch of the first differential amplifier.
Claim 56
Dependent Claim
88 words
The amplifier as recited in claim 53, wherein the first inverted cascode transistor circuit includes a first cascode transistor with a first control terminal, a second terminal connected to the first branch of the first differential amplifier, and a third terminal connected to the first load resistor, and wherein the second inverted cascode transistor circuit includes a second cascode transistor with a first control terminal, a second terminal connected to the second branch of the first differential amplifier, and a third terminal connected to the second load resistor.
Claim 57
Dependent Claim
173 words
A magnitude amplifier (magamp) comprising: a first unit including: a first differential input circuit for receiving and amplifying a differential analog input, a current switching circuit, connected to the first differential input circuit, for folding first and second signals of the differential analog input at a predetermined relationship between the signals of the differential analog input to provide first and second folded signals, a comparator for receiving the differential analog input and generating first and second control signals based on a comparison of the first and second signals of the differential analog input, the first and second control signals controlling the current switching circuit, and first and second output nodes that connect to the current switching circuit; and a second unit including: a second differential input circuit for receiving and amplifying a differential reference voltage and for providing offset current to align the first and second folded signals and for setting a full-scale input voltage range for the magamp, and third and fourth output nodes that connect to the second differential input circuit.
Claim 58
Dependent Claim
173 words
A magnitude amplifier (magamp) comprising: a first unit including: a first differential input circuit for receiving and amplifying a differential analog input, a current switching circuit, connected to the first differential input circuit, for folding first and second signals of the differential analog input at a predetermined relationship between the signals of the differential analog input to provide first and second folded signals, a comparator for receiving the differential analog input and generating first and second control signals based on a comparison of the first and second signals of the differential analog input, the first and second control signals controlling the current switching circuit, and first and second output nodes that connect to the current switching circuit; and a second unit including: a second differential input circuit for receiving and amplifying a differential reference voltage and for providing offset current to align the first and second folded signals and for setting a full-scale input voltage range for the magamp, and third and fourth output nodes that connect to the second differential input circuit.
Claim 59
Dependent Claim
23 words
The amplifier as recited in claim 55, wherein the first differential input circuit includes a first differential amplifier with first and second branches.
Claim 60
Dependent Claim
52 words
The amplifier as recited in claim 56, wherein the first branch of the first differential amplifier has a first input transistor for receiving the first signal of the differential analog input, and a first current source, the amplifier further inducting at least a first load resistor connected to the current switching circuit.
Claim 61
Dependent Claim
17 words
The amplifier as recited in claim 57, wherein the first input transistor is a bipolar npn transistor.
Claim 62
Dependent Claim
52 words
The amplifier as recited in claim 57, wherein the second branch of the first differential amplifier has a second input transistor for receiving the second signal of the differential analog input, and a second current source, the amplifier further including at least a second load resistor connected to the current switching circuit.
Claim 63
Dependent Claim
17 words
The amplifier as recited in claim 59, wherein the second input transistor is a bipolar npn transistor.
Claim 64
Dependent Claim
51 words
The amplifier as recited in claim 59, wherein the current switching circuit includes first, second, third, and fourth switching transistors, the first and second switching transistors forming a first portion of the current switching circuit and the third and fourth switching transistors forming a second portion of the current switching circuit.
Claim 65
Dependent Claim
20 words
The amplifier as recited in claim 61, wherein the first second, third, and fourth switching transistors are bipolar npn transistors.
Claim 66
Dependent Claim
74 words
The amplifier as recited in claim 61, wherein first terminals of the first and fourth switching transistors are connected to the first control signal of the comparator, second terminals of the first and second switching transistors are connected to the first input transistor, a third terminal of the first switching transistor is connected to the first load resistor, and a third terminal of the second switching transistor is connected to the second load resistor.
Claim 67
Dependent Claim
27 words
The amplifier as recited in claim 63, wherein the first output node is between the third terminal of the first switching transistor and the first load resistor.
Claim 68
Dependent Claim
74 words
The amplifier as recited in claim 63, wherein first terminals of the second and third switching transistors are connected to the second control signal of the comparator, second terminals of the third and fourth switching transistors are connected to the second input transistor, a third terminal of the third switching transistor is connected to the first load resistor, and a third terminal of the fourth switching transistor is connected to the second load resistor.
Claim 69
Dependent Claim
27 words
The amplifier as recited in claim 65, wherein the second output node is between the third terminal of the fourth switching transistor and the second load resistor.
Claim 70
Dependent Claim
39 words
The amplifier as recited in claim 55, wherein the first differential input circuit includes a first differential amplifier with first and second branches, and the second differential input circuit includes a second differential amplifier with first and second branches.
Claim 71
Dependent Claim
86 words
The amplifier as recited in claim 67, wherein the first branch of the first differential amplifier includes a first input transistor for receiving the first signal of the differential analog input, a first current source, and a first load resistor, the amplifier further comprising a first isolating transistor connected to the second output node for passing signals from the second output node to the first branch of the second differential amplifier, but isolating the second output node from the first branch of the second differential amplifier.
Claim 72
Dependent Claim
21 words
The amplifier as recited in claim 58, wherein the first input transistor and the first isolating transistor are bipolar npn transistors.
Claim 73
Dependent Claim
86 words
The amplifier as recited in claim 58, wherein the second branch of the first differential amplifier includes a second input transistor for receiving the second signal of the differential analog input, a second current source, and a second load resistor, the amplifier further comprising a second isolating transistor connected to the first output node for passing signals from the first output node to the second branch of the second differential amplifier, but isolating the first output node from the second branch of the second differential amplifier.
Claim 74
Dependent Claim
21 words
The amplifier as recited in claim 70, wherein the second input transistor and the second isolating transistor are bipolar npn transistors.
Claim 75
Dependent Claim
50 words
The amplifier as recited in claim 70, wherein the first branch of the second differential amplifier includes a third input transistor for receiving a first input of the differential reference voltage and a third current source, the first branch of the second differential amplifier connecting to the first isolating transistor.
Claim 76
Dependent Claim
17 words
The amplifier as recited in claim 72, wherein the third input transistor is a bipolar npn transistor.
Claim 77
Dependent Claim
50 words
The amplifier as recited in claim 72, wherein the second branch of the second differential amplifier includes a fourth input transistor for receiving a second input of the differential reference voltage and a fourth current source, the second branch of the second differential amplifier connecting to the second isolating transistor.
Claim 78
Dependent Claim
17 words
The amplifier as recited in claim 74, wherein the fourth input transistor is a bipolar npn transistor.
Claim 79
Dependent Claim
135 words
An amplifier for receiving a differential analog input and for providing an output at first and second outputs, the amplifier comprising: a differential input circuit for receiving the differential analog input; a comparator for receiving the differential analog input and for providing first and second control signals; a current switching circuit connected to the differential input circuit for folding the differential analog input in response to the first and second control signals; a first transistor connected on a first side to the current switching circuit and on a second side to the first output; a second transistor connected on a first side to the current switching circuit and on a second side to the second output; and a reference circuit coupled to control terminals of the first and second transistors for providing bias voltages thereto.
Claim 80
Dependent Claim
135 words
An amplifier for receiving a differential analog input and for providing an output at first and second outputs, the amplifier comprising: a differential input circuit for receiving the differential analog input; a comparator for receiving the differential analog input and for providing first and second control signals; a current switching circuit connected to the differential input circuit for folding the differential analog input in response to the first and second control signals; a first transistor connected on a first side to the current switching circuit and on a second side to the first output; a second transistor connected on a first side to the current switching circuit and on a second side to the second output; and a reference circuit coupled to control terminals of the first and second transistors for providing bias voltages thereto.
Claim 81
Dependent Claim
139 words
An amplifier for receiving a differential analog input and for providing an output at first and second outputs, the amplifier comprising: a differential input circuit for receiving the differential analog input; a comparator for receiving the differential analog input and for providing first and second control signals; a current switching circuit connected to the differential input circuit for folding the differential analog input in response to the first and second control signals; a first transistor connected on a first side to the current switching circuit and on a second side to the first output; a second transistor connected on a first side to the current switching circuit and on a second side to the second output; and first and second output transistors, each having a control input coupled to the second side of the respective first and second transistors.
Claim 82
Dependent Claim
139 words
An amplifier for receiving a differential analog input and for providing an output at first and second outputs, the amplifier comprising: a differential input circuit for receiving the differential analog input; a comparator for receiving the differential analog input and for providing first and second control signals; a current switching circuit connected to the differential input circuit for folding the differential analog input in response to the first and second control signals; a first transistor connected on a first side to the current switching circuit and on a second side to the first output; a second transistor connected on a first side to the current switching circuit and on a second side to the second output; and first and second output transistors, each having a control input coupled to the second side of the respective first and second transistors.
Claim 83
Dependent Claim
24 words
The amplifier of claim 77, further comprising first and second resistors coupled to the control inputs of the respective first and second output transistors.
Claim 84
Dependent Claim
147 words
An amplifier for receiving a differential analog input and for providing an output at first and second outputs, the amplifier comprising: a differential input circuit for receiving the differential analog input; a comparator for receiving the differential analog input and for providing first and second control signals; a current switching circuit connected to the differential input circuit for folding the differential analog input in response to the first and second control signals; a first cascode transistor connected on a first side to the current switching circuit and on a second side to the first output; and a second cascode transistor connected on a first side to the current switching circuit and on a second side to the second output; wherein the first and second cascode transistors are pnp transistors having emitters connected to the current switching circuit and collectors coupled to the respective first and second outputs.
Claim 85
Dependent Claim
147 words
An amplifier for receiving a differential analog input and for providing an output at first and second outputs, the amplifier comprising: a differential input circuit for receiving the differential analog input; a comparator for receiving the differential analog input and for providing first and second control signals; a current switching circuit connected to the differential input circuit for folding the differential analog input in response to the first and second control signals; a first cascode transistor connected on a first side to the current switching circuit and on a second side to the first output; and a second cascode transistor connected on a first side to the current switching circuit and on a second side to the second output; wherein the first and second cascode transistors are pnp transistors having emitters connected to the current switching circuit and collectors coupled to the respective first and second outputs.
Claim 86
Dependent Claim
152 words
An amplifier system having a plurality of connected stages, each of the stages comprising: an amplifier unit including: a differential input circuit for receiving a respective differential analog input signal, a comparator for receiving the respective differential analog input signal and for generating first and second control signals based on a relationship of the respective differential analog input signal, a current switching circuit connected to the differential input circuit for folding the respective differential analog input signal in response to the first and second control signals, and first and second output circuits connected to the current switching circuit for providing respective first and second output signals to a next stage; and a reference unit including: a second differential input circuit for receiving a respective differential reference signal, for providing an offset signal to align the first and second output signals, and for providing to the next stage a differential reference output signal.
Claim 87
Dependent Claim
152 words
An amplifier system having a plurality of connected stages, each of the stages comprising: an amplifier unit including: a differential input circuit for receiving a respective differential analog input signal, a comparator for receiving the respective differential analog input signal and for generating first and second control signals based on a relationship of the respective differential analog input signal, a current switching circuit connected to the differential input circuit for folding the respective differential analog input signal in response to the first and second control signals, and first and second output circuits connected to the current switching circuit for providing respective first and second output signals to a next stage; and a reference unit including: a second differential input circuit for receiving a respective differential reference signal, for providing an offset signal to align the first and second output signals, and for providing to the next stage a differential reference output signal.
Claim 88
Dependent Claim
36 words
The amplifier system of claim 80, wherein each reference unit has first and second differential transistor pairs, the first pair for providing the differential reference output signal, and the second pair for providing the offset signal.
Claim 89
Dependent Claim
63 words
The amplifier system of claim 81, wherein each reference unit has a third pair of transistors, each transistor in the second pair of transistors being connected on a first side to a respective one of the third pair of transistors and on a second side to a current source, the third pair of transistors being coupled to the first and second output circuits.
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