Integration circuit

Claim 2

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and a positive feedback circuit constituted by a third transistor having collector and base electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a fourth transistor having collector and base electrodes respectively connected to the emitter electrodes of said second and first bipolar transistors.

Claim 3

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and a second field-effect transistor, having source and drain electrodes respectively connected to collector electrodes of said first and second bipolar transistors, and a gate electrode to which a control voltage is applied, for controlling a DC gain of said integration circuit.

Claim 4

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and a second field-effect transistor, having source and drain electrodes respectively connected to collector electrodes of said first and second bipolar transistors, and a gate electrode to which a control voltage is applied, for controlling a DC gain of said integration circuit.

Claim 5

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and a positive feedback circuit constituted by a third transistor having collector and base electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, a fourth transistor having collector and base electrodes respectively connected to the emitter electrodes of said second and first bipolar transistors, and a DC gain control circuit constituted by a second field-effect transistor having source and drain electrodes respectively connected to collector electrodes of said first and second bipolar transistors, and a gate electrode to which a control voltage is applied.

Claim 6

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and a positive feedback circuit constituted by a third transistor having collector and base electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, a fourth transistor having collector and base electrodes respectively connected to the emitter electrodes of said second and first bipolar transistors, and a DC gain control circuit constituted by a second field-effect transistor having source and drain electrodes respectively connected to collector electrodes of said first and second bipolar transistors, and a gate electrode to which a control voltage is applied.

Claim 7

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and a fixed resistor connected in parallel with the source and drain electrodes of said field-effect transistor.

Claim 8

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and a fixed resistor connected in parallel with the source and drain electrodes of said field-effect transistor.

Claim 9

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and a first fixed resistor series-connected between the source electrode of said field-effect transistor and the emitter electrode of said field-effect transistor and the emitter electrode of said bipolar transistor, and a second fixed resistor series-connected between the drain electrode of said field-effect transistor and the emitter electrode of said bipolar transistor.

Claim 10

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and a first fixed resistor series-connected between the source electrode of said field-effect transistor and the emitter electrode of said field-effect transistor and the emitter electrode of said bipolar transistor, and a second fixed resistor series-connected between the drain electrode of said field-effect transistor and the emitter electrode of said bipolar transistor.

Claim 11

A circuit according to claim 5, further comprising a third fixed resistor connected in parallel with the source and drain electrodes of said field-effect transistor.

Claim 12

A circuit according to claim 5, further comprising a third fixed resistor connected in parallel with a series circuit constituted by said field-effect transistor and said first and second fixed resistors.

Claim 13

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and emitter followers connected respectively between two input terminals and base electrodes of said first and second bipolar transistors, and an output terminal connected to a collector of said second bipolar transistor.

Claim 14

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; a field-effect transistor having source and drain electrodes respectively connected to the emitter electrodes of said first and second bipolar transistors, and a gate electrode connected to said control terminal; and emitter followers connected respectively between two input terminals and base electrodes of said first and second bipolar transistors, and an output terminal connected to a collector of said second bipolar transistor.

Claim 15

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; and an impedance changing circuit network connected between the emitter electrodes of said first and second bipolar transistors and constituted by at least a field-effect transistor having a gate electrode connected to the control terminal and a resistor connected to the field-effect transistor.

Claim 16

An integration circuit comprising: a differential amplifier including at least first and second bipolar transistors having emitter electrodes and serving as amplifying elements; a capacitor serving as a load of said differential amplifier; a control terminal to which a control voltage is applied; and an impedance changing circuit network connected between the emitter electrodes of said first and second bipolar transistors and constituted by at least a field-effect transistor having a gate electrode connected to the control terminal and a resistor connected to the field-effect transistor.

Claim 17

A circuit according to claim 9, wherein said impedance changing circuit network is constituted by a plurality of series-connected impedance changing circuits, and each of said impedance changing circuits is constituted by a field-effect transistor and a resistor parallel-connected between source and drain electrodes of said field-effect transistor.

Claim 18

An integration circuit comprising: a differential amplifier including first, second, third, and fourth bipolar transistors serving as amplifying elements, said first and second bipolar transistors having base electrodes as input terminals, a collector electrode of at least one of said first and second bipolar transistors serving as an output terminal, said third bipolar transistor having collector and base electrodes respectively connected to emitter electrodes of said first and second bipolar transistors, and said fourth bipolar transistor having collector and base electrodes respectively connected to the emitter electrodes of said second and first bipolar transistors; a capacitor connected, as a load, to said differential amplifier; and a field-effect transistor having source and drain electrodes respectively connected to emitter electrodes of said third and fourth transistors, and a gate electrode to which a control voltage is applied.

Claim 19

An integration circuit comprising: a differential amplifier including first, second, third, and fourth bipolar transistors serving as amplifying elements, said first and second bipolar transistors having base electrodes as input terminals, a collector electrode of at least one of said first and second bipolar transistors serving as an output terminal, said third bipolar transistor having collector and base electrodes respectively connected to emitter electrodes of said first and second bipolar transistors, and said fourth bipolar transistor having collector and base electrodes respectively connected to the emitter electrodes of said second and first bipolar transistors; a capacitor connected, as a load, to said differential amplifier; and a field-effect transistor having source and drain electrodes respectively connected to emitter electrodes of said third and fourth transistors, and a gate electrode to which a control voltage is applied.

Claim 20

An integration circuit comprising: a differential amplifier including at least first and second field-effect transistors having source and drain electrodes and serving as amplifying elements; a capacitor connected, as a load, to said differential amplifier; and an impedance changing circuit network connected between the source electrodes of said first and second field-effect transistors and including at least a third field-effect transistor having source and drain electrodes, and a resistor; wherein said impedance changing circuit network includes a first fixed resistor series-connected between the source electrode of said first field-effect transistor and the source electrode of said third field-effect transistor, and a second fixed resistor series-connected between the source electrode of said second field-effect transistor and the drain electrode of said third field-effect transistor.

Claim 21

An integration circuit comprising: a differential amplifier including at least first and second field-effect transistors having source and drain electrodes and serving as amplifying elements; a capacitor connected, as a load, to said differential amplifier; and an impedance changing circuit network connected between the source electrodes of said first and second field-effect transistors and including at least a third field-effect transistor having source and drain electrodes, and a resistor; wherein said impedance changing circuit network includes a first fixed resistor series-connected between the source electrode of said first field-effect transistor and the source electrode of said third field-effect transistor, and a second fixed resistor series-connected between the source electrode of said second field-effect transistor and the drain electrode of said third field-effect transistor.

Claim 22

An integration circuit comprising: a differential amplifier including at least first and second field-effect transistors having source and drain electrodes and serving as amplifying elements; a capacitor connected, as a load, to said differential amplifier; and an impedance changing circuit network connected between the source electrodes of said first and second field-effect transistors and including at least a third field-effect transistor having source and drain electrodes, and a resistor; wherein said impedance changing circuit network includes a fixed resistor connected between the source and drain electrodes of said third field-effect transistor.

Claim 23

An integration circuit comprising: a differential amplifier including at least first and second field-effect transistors having source and drain electrodes and serving as amplifying elements; a capacitor connected, as a load, to said differential amplifier; and an impedance changing circuit network connected between the source electrodes of said first and second field-effect transistors and including at least a third field-effect transistor having source and drain electrodes, and a resistor; wherein said impedance changing circuit network includes a fixed resistor connected between the source and drain electrodes of said third field-effect transistor.

Claim 24

An integration circuit comprising: a first differential amplifier constituted by at least first and second field-effect transistors having source and drain electrodes and serving as amplifying elements; a second differential amplifier, constituted by third and fourth field-effect transistors having source and drain electrodes and serving as amplifying elements, for outputting an output having a phase opposite to that of an output from said first differential amplifier; a capacitor connected, as a load, to said first and second differential amplifiers; a first impedance changing circuit network including at least a fifth field-effect transistor and resistors which are connected between the source electrodes of said first and second field-effect transistors; and a second impedance changing circuit network including at least a sixth field-effect transistor and resistors which are connected between the source electrodes of said third and fourth field-effect transistors.

Claim 25

An integration circuit comprising: a first differential amplifier constituted by at least first and second field-effect transistors having source and drain electrodes and serving as amplifying elements; a second differential amplifier, constituted by third and fourth field-effect transistors having source and drain electrodes and serving as amplifying elements, for outputting an output having a phase opposite to that of an output from said first differential amplifier; a capacitor connected, as a load, to said first and second differential amplifiers; a first impedance changing circuit network including at least a fifth field-effect transistor and resistors which are connected between the source electrodes of said first and second field-effect transistors; and a second impedance changing circuit network including at least a sixth field-effect transistor and resistors which are connected between the source electrodes of said third and fourth field-effect transistors.