Folding circuit and serial-type A/D converter

Claim 2

A folding circuit comprising: an input terminal; an output terminal; a first operational amplifier having an inverting input, a noninverting input, and an output, said inverting input of said first operational amplifier coupled to said input terminal; a first transistor having a base coupled to said output of said first operational amplifier, and having an emitter coupled to said output terminal; a first feedback means for coupling said output terminal to said inverting input of said first operational amplifier; a second operational amplifier having an inverting input, a noninverting input, and an output, said noninverting input of said second operational amplifier coupled to said input terminal; a second transistor having a base coupled to said output of said second operational amplifier, and having an emitter coupled to said output terminal; and, a second feedback means for coupling said output terminal to said inverting input of said second operational amplifier.

Claim 3

A serial analog-to-digital converting circuit comprising a plurality of cascade connected folding circuit cells, each of said plurality of cascade connected folding circuit cells including an input terminal and an output terminal, wherein the output terminal of a cascade connected folding circuit cell of a preceding stage is coupled to the input terminal of a cascade connected folding circuit cell of a succeeding stage, each of said cascade connected folding circuit cells further including: a first operational amplifier having an inverting input, a noninverting input, and an output, said inverting input of said first operational amplifier coupled to said input terminal; a first transistor having a base coupled to said output of said first operational amplifier, and having an emitter coupled to said output terminal; a first feedback means for coupling said output terminal to said inverting input of said first operational amplifier; a second operational amplifier having an inverting input, a noninverting input, and an output, said noninverting input of said second operational amplifier coupled to said input terminal; a second transistor having a base coupled to said output of said second operational amplifier, and having an emitter coupled to said output terminal; and, a second feedback means for coupling said output terminal to said inverting input of said second operational amplifier.

Claim 4

A serial analog-to-digital converting circuit comprising a plurality of cascade connected folding circuit cells, each of said plurality of cascade connected folding circuit cells including an input terminal and an output terminal, wherein the output terminal of a cascade connected folding circuit cell of a preceding stage is coupled to the input terminal of a cascade connected folding circuit cell of a succeeding stage, each of said cascade connected folding circuit cells further including: a first operational amplifier having an inverting input, a noninverting input, and an output, said inverting input of said first operational amplifier coupled to said input terminal; a first transistor having a base coupled to said output of said first operational amplifier, and having an emitter coupled to said output terminal; a first feedback means for coupling said output terminal to said inverting input of said first operational amplifier; a second operational amplifier having an inverting input, a noninverting input, and an output, said noninverting input of said second operational amplifier coupled to said input terminal; a second transistor having a base coupled to said output of said second operational amplifier, and having an emitter coupled to said output terminal; and, a second feedback means for coupling said output terminal to said inverting input of said second operational amplifier.

Claim 5

A serial analog-to-digital converter comprising: a plurality of serially connected folding circuits including a first folding circuit, each of said plurality of serially connected folding circuits having an analog input terminal and an analog output terminal, wherein the analog output terminal of a preceding serially connected folding circuit is coupled to the analog input terminal of a succeeding serially connected folding circuit; a maximum value detecting means, coupled to the analog output terminal of one of said serially connected folding circuits, for detecting a maximum value of a folded analog signal provided at said analog output terminal of said one of said serially connected folding circuits; an offset calculating means, coupled to said maximum value detecting means, for calculating a correction offset value on the basis of a series of maximum values detected by maximum value detecting means, said correction offset value indicative of an estimated offset error; a correction offset value memory means, coupled to said offset calculating means, for storing said correction offset value calculated by said offset calculating means, means, coupled to said correction offset value memory means and to at least one of said plurality of folding circuits, for providing said at least one of said plurality of serially connected folding circuits with said correction offset value stored in said offset value memory means; ramp voltage generating means for generating a ramp voltage signal; a switching means for connecting said ramp voltage generating means to the analog input terminal of said first folding circuit when said maximum value detecting means is detecting said maximum value; and, a control means coupled to and for controlling said maximum value detecting means, said offset calculating means, said memory means, and said ramp voltage generating means.

Claim 6

A serial analog-to-digital converter comprising: a plurality of serially connected folding circuits including a first folding circuit, each of said plurality of serially connected folding circuits having an analog input terminal and an analog output terminal, wherein the analog output terminal of a preceding serially connected folding circuit is coupled to the analog input terminal of a succeeding serially connected folding circuit; a maximum value detecting means, coupled to the analog output terminal of one of said serially connected folding circuits, for detecting a maximum value of a folded analog signal provided at said analog output terminal of said one of said serially connected folding circuits; an offset calculating means, coupled to said maximum value detecting means, for calculating a correction offset value on the basis of a series of maximum values detected by maximum value detecting means, said correction offset value indicative of an estimated offset error; a correction offset value memory means, coupled to said offset calculating means, for storing said correction offset value calculated by said offset calculating means, means, coupled to said correction offset value memory means and to at least one of said plurality of folding circuits, for providing said at least one of said plurality of serially connected folding circuits with said correction offset value stored in said offset value memory means; ramp voltage generating means for generating a ramp voltage signal; a switching means for connecting said ramp voltage generating means to the analog input terminal of said first folding circuit when said maximum value detecting means is detecting said maximum value; and, a control means coupled to and for controlling said maximum value detecting means, said offset calculating means, said memory means, and said ramp voltage generating means.

Claim 7

A serial analog-to-digital converter as recited in claim 3, wherein an estimated offset error of each serially connected folding circuit is calculated based on a detected maximum value of one of said serially connected folding circuits.