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US5677213A
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Method for forming a semiconductor device having a shallow junction and a low sheet resistance
Assignee: SK Hynix Inc
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Filing: 1996-02-22
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Granted: 1997-10-14
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Expires: 2016-02-22
Abstract
Abstract In accordance with an aspect of the present invention, there is provided a method for forming a junction of a low sheet resistance on a silicon substrate, comprising the steps of forming an amorphous silicon layer on said silicon substrate; implanting impurity ions into said amorphous silicon layer; implanting transition metal ions into said amorphous silicon layer; and thermally treating said amorphous silicon layer and silicon substrate such that said transition metal ions diffuse to the surface of said silicon substrate and said impurity ions diffuse into said silicon substrate.
Inventors
- 👤 Kil Ho Lee
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 19:23
CPC Classifications
H; H10; H10P; H10P30/00; H10P30/20; H10P30/202; H10P30/204; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D30/0227; H10D62/00; H10D62/10; H10D62/13; H10D62/149; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; H10D64/0112; H10D64/20; H10D64/23; H10D64/251; H10D64/258; H10D64/259; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
131 words
A method for forming a shallow junction of a low resistance on a silicon substrate, comprising the steps of: forming an amorphous silicon layer on said silicon substrate; implanting impurity ions and transition metal ions into said amorphous silicon layer, wherein implanting energy of transition metal ions is lower than that of said impurity ions; and applying a rapid thermal process to said amorphous silicon layer and said silicon substrate, to simultaneously diffuse said impurity ions and said transition metal ions into said silicon substrate, whereby said transition metal ions are diffused into said silicon substrate and then a silicide layer is formed on a surface of said silicon substrate, and said impurity ions are diffused into said silicon substrate and then a shallow junction is formed in said silicon substrate.
Claim 2
Independent Claim
131 words
A method for forming a shallow junction of a low resistance on a silicon substrate, comprising the steps of: forming an amorphous silicon layer on said silicon substrate; implanting impurity ions and transition metal ions into said amorphous silicon layer, wherein implanting energy of transition metal ions is lower than that of said impurity ions; and applying a rapid thermal process to said amorphous silicon layer and said silicon substrate, to simultaneously diffuse said impurity ions and said transition metal ions into said silicon substrate, whereby said transition metal ions are diffused into said silicon substrate and then a silicide layer is formed on a surface of said silicon substrate, and said impurity ions are diffused into said silicon substrate and then a shallow junction is formed in said silicon substrate.
Claim 3
Dependent Claim
15 words
A method in accordance with claim 1, wherein said impurity ions are BF 2 ions.
Claim 4
Dependent Claim
26 words
A method in accordance with claim 1, wherein the projected range of said impurity ions is set at half the thickness of said amorphous silicon layer.
Claim 5
Dependent Claim
18 words
A method in accordance with claim 1, wherein said transition metal is one of tungsten, titanium or cobalt.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-10-13 | 2001-04-14 | 2001-10-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-10-13 | 2005-04-14 | 2005-10-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-10-13 | 2009-04-14 | 2009-10-14 | $7700.00 | Window Closed / Lapsed |