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US5670828A Expired / Lapsed US ⏱️ 0.0 years remaining

Tunneling technology for reducing intra-conductive layer capacitance

Assignee: Advanced Micro Devices Inc
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Filing: 1995-02-21
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Granted: 1997-09-23
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Expires: 2015-02-21
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Abstract

Abstract The control speed of semiconductor circuitry is increased by forming air tunnels in the interwiring spaces of a conductive pattern to reduce intra-conductive layer capacitance.

Inventors

  • 👤 Robin W. Cheung
  • 👤 Simon S. Chan
  • 👤 Richard J. Huang

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-05 22:14
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/01; H10W20/071; H10W20/072; H10W20/40; H10W20/45; H10W20/46; H10W20/48; H10W20/495

Claims Analysis

Total Claims: 22
Claim 1
Independent Claim 83 words
A semiconductor device comprising: a substrate; an insulating layer formed on the substrate; and a conductive pattern formed on the insulating layer; wherein the conductive pattern comprises conductive lines separated by interwiring spaces, and a selected plurality of the interwiring spaces contain air forming air tunnels in the interwiring spaces, wherein the interwiring spaces containing air tunnels comprise: a dielectric liner on the conductive lines and substrate; and a capping layer enclosing air within each interwiring space to form the individual air tunnels.
Claim 2
Dependent Claim 83 words
A semiconductor device comprising: a substrate; an insulating layer formed on the substrate; and a conductive pattern formed on the insulating layer; wherein the conductive pattern comprises conductive lines separated by interwiring spaces, and a selected plurality of the interwiring spaces contain air forming air tunnels in the interwiring spaces, wherein the interwiring spaces containing air tunnels comprise: a dielectric liner on the conductive lines and substrate; and a capping layer enclosing air within each interwiring space to form the individual air tunnels.
Claim 3
Dependent Claim 18 words
A semiconductor device according to claim 1, wherein the air tunnels have a dielectric constant of about 1.
Claim 4
Dependent Claim 29 words
A semiconductor device according to claim 1, wherein the air tunnels are formed in a portion of the conductive pattern having an interwiring spacing less than about 1 micron.
Claim 5
Dependent Claim 19 words
The semiconductor device according to claim 1, wherein air tunnels are formed in interwiring spaces between consecutive conductive lines.
Claim 6
Dependent Claim 20 words
The semiconductor device according to claim 4, wherein the number of consecutive conductive lines is about 2 to about 256.
Claim 7
Dependent Claim 17 words
The semiconductor device according to claim 5, wherein the number of consecutive conductive lines is about 64.
Claim 8
Dependent Claim 27 words
The semiconductor device according to claim 4, wherein the conductive pattern comprises a plurality of separate sections containing air tunnels in interwiring spaces between consecutive conductive lines.
Claim 9
Dependent Claim 30 words
The semiconductor device according to claim 7, wherein the distance between each section containing air tunnels in interwiring spaces between consecutive conductive lines is about 10 to about 100 microns.
Claim 10
Dependent Claim 26 words
The semiconductor device according to claim 8, wherein the distance between each section containing air tunnels in interwiring spaces between conductive lines is about 20 microns.
Claim 11
Dependent Claim 24 words
The semiconductor device according to claim 1, further comprising a plurality of layers of insulating material, wherein each layer has a conductive pattern thereon.
Claim 12
Dependent Claim 25 words
The semiconductor device according to claim 10, further comprising at least 1 conductive via forming an electrical interconnection between the conductive patterns of different layers.
Claim 13
Dependent Claim 30 words
The semiconductor device according to claim 10, wherein a plurality of the layers of insulating material contain a conductive pattern with air tunnels in interwiring spaces between consecutive conductive lines.
Claim 14
Dependent Claim 22 words
The semiconductor device according to claim 1, wherein the dielectric liner has a thickness of about 500 Å to about 2500 Å.
Claim 15
Dependent Claim 14 words
The semiconductor device according to claim 1, wherein the dielectric liner comprises silicon dioxide.
Claim 16
Dependent Claim 19 words
The semiconductor device according to claim 1, wherein the dielectric liner is formed by plasma enhanced chemical vapor deposition.
Claim 17
Dependent Claim 20 words
The semiconductor device according to claim 1, wherein each air tunnel contains at least two holes through the capping layer.
Claim 18
Dependent Claim 22 words
The semiconductor device according to claim 1, wherein the capping layer has a thickness of about 1000 Å to about 2000 Å.
Claim 19
Dependent Claim 14 words
The semiconductor device according to claim 1, wherein the capping layer comprises silicon dioxide.
Claim 20
Dependent Claim 19 words
The semiconductor device according to claim 1, wherein the capping layer is formed by plasma enhanced chemical vapor deposition.
Claim 21
Dependent Claim 34 words
The semiconductor device according to claim 1, wherein the conductive material comprises a member selected from the group consisting of refractory materials, aluminum, aluminum alloys, copper, copper alloys, tungsten, tungsten alloy, and polycrystalline silicon.
Claim 22
Dependent Claim 27 words
The semiconductor device according to claim 1, wherein the insulating material comprises a member selected from the group consisting of nitrides, oxides, oxynitrides, polyimides and polymeric materials.

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Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-09-22 2001-03-24 2001-09-23 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-09-22 2005-03-24 2005-09-23 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-09-22 2009-03-24 2009-09-23 $7700.00 Window Closed / Lapsed

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