Patent US5663590A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5663590A Expired / Lapsed US ⏱️ 0.0 years remaining

Product of process for formation of vias (or contact openings) and fuses in the same insulation layer with minimal additional steps

Assignee: Avago Technologies International Sales Pte Ltd
•
Filing: 1996-07-31
•
Granted: 1997-09-02
•
Expires: 2016-07-31
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A process and resulting product are described for forming an integrated circuit structure with horizontal fuses on an insulation layer formed over other portions of the integrated circuit structure by forming rectangular recesses in the insulation layer which are subsequently filled during a subsequent metal deposition step which also serves to fill with the same metal vias or contact openings which have been etched through the insulation layer. Subsequent planarization of the deposited metal layer down to the vias or contact openings, i.e. to remove the portions of the metal layer over the insulation layer, leaves the metal in the vias or contact openings and also leaves metal stringers on the sidewalls of the rectangular recess which then serve as fusible links (fuses) which are then connected to one or more metal lines thereafter formed on the insulation layer.

Inventors

  • 👤 Ashok K. Kapoor

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-04 10:16
CPC Classifications
H; H10; H10W; H10W20/00; H10W20/40; H10W20/49; H10W20/493; H10W20/01; H10W20/031; H10W20/064; H10W20/065; Y; Y10; Y10S; Y10S148/00; Y10S148/055

Claims Analysis

Total Claims: 9
Claim 1
Independent Claim 362 words
An integrated circuit structure comprising one or more metal-filled vias or contact openings and one or more metal fuses formed in the same insulation layer formed over other portions of said integrated circuit structure which comprises: a) an integrated circuit structure having raised portions thereon comprising raised lines and/or raised gate electrodes; b) a single layer of insulation formed over said integrated circuit structure; c) one or more rectangular recesses formed in an upper surface of said single insulation layer over one or more regions of said integrated circuit structure where none of said raised portions of said integrated circuit structure are located, whereby metal subsequently deposited in said one or more recesses to form said one or more metal fuses will not contact said one or more raised portions of said integrated circuit structure; d) one or more vias or contact openings extending through said same single insulation layer to at least one of said raised portions of said integrated circuit structure beneath said single insulation layer; e) a single metal layer deposited over said insulation layer and into said one or more recesses and into said one or more vias or contact openings to fill up said recesses and said vias or contact openings, said metal layer planarized, after being deposited, to remove said metal from said upper surface of said single insulation layer, leaving metal from said metal layer in said one or more vias or contact openings and also leaving metal from said same metal layer as one or more metal stringers on sidewalls of said one or more recesses; and f) one or more metal lines formed on said insulation layer in electrical contact with at least one end of one or more of said metal stringers; whereby said metal stringers in contact with said one or more metal lines will function as a fuse between said one or more lines and other portions of said integrated circuit structure in electrical contact with an opposite end of said metal stringers in contact with said one or more metal lines, and said fuse formed in said recess will not contact said raised portions of said integrated circuit structure.
Claim 2
Dependent Claim 362 words
An integrated circuit structure comprising one or more metal-filled vias or contact openings and one or more metal fuses formed in the same insulation layer formed over other portions of said integrated circuit structure which comprises: a) an integrated circuit structure having raised portions thereon comprising raised lines and/or raised gate electrodes; b) a single layer of insulation formed over said integrated circuit structure; c) one or more rectangular recesses formed in an upper surface of said single insulation layer over one or more regions of said integrated circuit structure where none of said raised portions of said integrated circuit structure are located, whereby metal subsequently deposited in said one or more recesses to form said one or more metal fuses will not contact said one or more raised portions of said integrated circuit structure; d) one or more vias or contact openings extending through said same single insulation layer to at least one of said raised portions of said integrated circuit structure beneath said single insulation layer; e) a single metal layer deposited over said insulation layer and into said one or more recesses and into said one or more vias or contact openings to fill up said recesses and said vias or contact openings, said metal layer planarized, after being deposited, to remove said metal from said upper surface of said single insulation layer, leaving metal from said metal layer in said one or more vias or contact openings and also leaving metal from said same metal layer as one or more metal stringers on sidewalls of said one or more recesses; and f) one or more metal lines formed on said insulation layer in electrical contact with at least one end of one or more of said metal stringers; whereby said metal stringers in contact with said one or more metal lines will function as a fuse between said one or more lines and other portions of said integrated circuit structure in electrical contact with an opposite end of said metal stringers in contact with said one or more metal lines, and said fuse formed in said recess will not contact said raised portions of said integrated circuit structure.
Claim 3
Dependent Claim 43 words
The integrated circuit structure of claim 1 wherein said metal layer deposited over said insulation layer to fill said one or more vias or contact openings and said one or more rectangular recesses comprises a tungsten-containing metal and said metal lines comprise aluminum.
Claim 4
Dependent Claim 77 words
The integrated circuit structure of claim 1 wherein each of said one or more rectangular recesses, formed over said one or more regions of said integrated circuit structure where none of said raised portions of said integrated circuit structure are located, has a depth less than the thickness of said insulation layer, whereby metal subsequently deposited in said one or more recesses to form said one or more metal fuses will not contact said integrated circuit structure.
Claim 5
Dependent Claim 48 words
The integrated circuit structure of claim 1 wherein said metal layer which fills said contact openings in said insulation layer and from which said one or more metal stringers comprising said fuses are formed comprises a metal selected from the group consisting of tungsten, titanium, and mixtures thereof.
Claim 6
Dependent Claim 30 words
The integrated circuit structure of claim 1 wherein said single layer of insulation is formed from an insulation material selected from the group consisting of silicon oxide and silicon nitride.
Claim 7
Dependent Claim 33 words
The integrated circuit structure of claim 1 wherein said one or more metal lines are formed from a metal selected from the group consisting of aluminum, gold, platinum, tungsten, titanium, and mixtures thereof.
Claim 8
Dependent Claim 391 words
An integrated circuit structure having one or more fuses and one or more vias or contact openings formed in the same insulation layer therein comprising: a) a semiconductor substrate having raised gate electrodes and raised lines comprising raised portions of said integrated circuit structures formed therein; b) a single insulation layer formed over said semiconductor substrate, said single insulation layer consisting essentially of an insulation material selected from the group consisting of silicon oxide and silicon nitride; c) one or more rectangular recesses formed in said single insulation layer over one or more regions of said semiconductor substrate where no underlying raised portions of said integrated circuit structure are positioned, whereby metal subsequently deposited in said one or more recesses will not contact said underlying raised portions of said integrated circuit structure, said one or more recesses formed to a depth at least equal to the thickness of said single insulation layer over said gate electrodes, each of said one or more rectangular recesses having sidewalls thereon; d) one or more contact openings or vias extending completely through said same single insulation layer to said raised gate electrodes underlying said single layer of insulation; e) a metal selected from the group consisting of tungsten, titanium, and mixtures thereof filling said one or more contact openings and comprising metal stringers formed in said one or more rectangular recesses adjacent said sidewalls of said one or more rectangular recesses, said one or more metal stringers and said metal in said one or more contact openings formed from a single layer of said metal formed over said single insulation layer and then planarized to leave only said metal in said contact openings or vias and said metal stringers in said one or more recesses; and f) one or more metal lines on said insulation layer in electrical contact with at least one end of said one or more metal stringers, said one or more metal lines consisting essentially of a metal selected from the group consisting of aluminum, gold, platinum, tungsten, titanium, and mixtures thereof; wherein said one or more metal stringers function as a fuse between said one or more lines and other portions of said integrated circuit structure in electrical contact with an opposite end of said one or more metal stringers in electrical contact with said one or more metal lines.
Claim 9
Dependent Claim 391 words
An integrated circuit structure having one or more fuses and one or more vias or contact openings formed in the same insulation layer therein comprising: a) a semiconductor substrate having raised gate electrodes and raised lines comprising raised portions of said integrated circuit structures formed therein; b) a single insulation layer formed over said semiconductor substrate, said single insulation layer consisting essentially of an insulation material selected from the group consisting of silicon oxide and silicon nitride; c) one or more rectangular recesses formed in said single insulation layer over one or more regions of said semiconductor substrate where no underlying raised portions of said integrated circuit structure are positioned, whereby metal subsequently deposited in said one or more recesses will not contact said underlying raised portions of said integrated circuit structure, said one or more recesses formed to a depth at least equal to the thickness of said single insulation layer over said gate electrodes, each of said one or more rectangular recesses having sidewalls thereon; d) one or more contact openings or vias extending completely through said same single insulation layer to said raised gate electrodes underlying said single layer of insulation; e) a metal selected from the group consisting of tungsten, titanium, and mixtures thereof filling said one or more contact openings and comprising metal stringers formed in said one or more rectangular recesses adjacent said sidewalls of said one or more rectangular recesses, said one or more metal stringers and said metal in said one or more contact openings formed from a single layer of said metal formed over said single insulation layer and then planarized to leave only said metal in said contact openings or vias and said metal stringers in said one or more recesses; and f) one or more metal lines on said insulation layer in electrical contact with at least one end of said one or more metal stringers, said one or more metal lines consisting essentially of a metal selected from the group consisting of aluminum, gold, platinum, tungsten, titanium, and mixtures thereof; wherein said one or more metal stringers function as a fuse between said one or more lines and other portions of said integrated circuit structure in electrical contact with an opposite end of said one or more metal stringers in electrical contact with said one or more metal lines.

References Cited (Backward Citations)

US4679310A Cited
US4647340A Cited
US5212352A Cited
US5011791A Cited
US5026666A Cited
US5059555A Cited
US5144404A Cited
US5212102A Cited
US5166556A Cited
US5365105A Cited
US5124780A Cited
US5175122A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 2000-09-01 2001-03-03 2001-09-02 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2004-09-01 2005-03-03 2005-09-02 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2008-09-01 2009-03-03 2009-09-02 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag