Patent US5648778A successfully refreshed from Google Patents.
US5648778A
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Stereo audio CODEC
Assignee: Microsemi Semiconductor US Inc
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Filing: 1996-07-17
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Granted: 1997-07-15
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Expires: 2016-07-17
Abstract
Abstract A stereo audio CODEC, including means for performing D/A and A/D conversions, means for reducing digitally induced noise during attenuation/gain changes, data format conversion means, analog and digital filtering means, analog mixing means, on-chip 16-sample, 32-bit wide record and playback FIFOs, serial interface with external serial DSP, large local memory for supplementing on-chip record and playback FIFOs, control registers, register data bus and synthesizer DAC.
Inventors
- 👤 Alfredo R. Linz
- 👤 Carlin Dru Cabler
- 👤 Glen W. Brown
- 👤 Martin P. Soques
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-07 12:26
CPC Classifications
H; H03; H03K; H03K23/00; H03K23/64; H03K23/68; G; G06; G06F; G06F3/00; G06F3/16; G06F3/162; G10; G10H; G10H1/00; G10H1/0033; G10H1/0041; G10H1/0058; G10H1/0066; G10H1/02; G10H1/06; G10H1/12; G10H1/125; G10H7/00; G10H7/002; F; F02; F02B; F02B75/00; F02B75/02; F02B2075/022; F02B2075/027; G10H2230/00; G10H2230/025; G10H2230/035; G10H2240/00; G10H2240/171; G10H2240/281; G10H2240/311; G10H2250/00; G10H2250/055; G10H2250/111; G10H2250/115; G10H2250/131; G10H2250/165; G10H2250/175; G10H2250/181; G10H2250/191; G10H2250/541; G10H2250/545; G10H2250/571; G10H2250/611
Claims Analysis
Total Claims: 12
Claim 1
Independent Claim
111 words
A monolithic audio control circuit of the type including a plurality of analog inputs and outputs, analog signal mixing capability, digital-to-analog conversion circuitry, and analog-to-digital conversion circuitry, comprising: a record signal path, including a plurality of analog input signals and an analog-to-digital conversion circuit; a playback signal path, including a digital input signal and a digital-to-analog conversion circuit; on-chip FIFO memory for storing digital audio data samples to be input to said digital-to-analog conversion circuit and data samples output from said analog-to-digital conversion circuit; and a logic control circuit for independently controlling the sampling rate of said playback signal path digital-to-analog conversion circuit and said record signal path analog-to-digital conversion circuit.
Claim 2
Dependent Claim
111 words
A monolithic audio control circuit of the type including a plurality of analog inputs and outputs, analog signal mixing capability, digital-to-analog conversion circuitry, and analog-to-digital conversion circuitry, comprising: a record signal path, including a plurality of analog input signals and an analog-to-digital conversion circuit; a playback signal path, including a digital input signal and a digital-to-analog conversion circuit; on-chip FIFO memory for storing digital audio data samples to be input to said digital-to-analog conversion circuit and data samples output from said analog-to-digital conversion circuit; and a logic control circuit for independently controlling the sampling rate of said playback signal path digital-to-analog conversion circuit and said record signal path analog-to-digital conversion circuit.
Claim 3
Dependent Claim
26 words
The audio control circuit of claim 1, further comprising off-chip local memory for storing digital audio data samples to be input to said digital-to-analog conversion circuit.
Claim 4
Dependent Claim
132 words
A stereo audio coder-decoder (CODEC), comprising: (a) an analog mixer circuit having a plurality of inputs and outputs; (b) a digital-to-analog conversion circuit having at least one input and one output, wherein said at least one output of said digital-to-analog conversion circuit is connected to an input of said analog mixer circuit; (c) an analog-to-digital conversion circuit having at least one input and one output, wherein said at least one input of said analog-to-digital conversion circuit is connected to an output of said analog mixer circuit; (d) data format conversion circuitry connected to said at least one input of said digital-to-analog conversion circuit and to said at least one output of said analog-to-digital-conversion circuit; wherein said digital-to-analog and said analog-to-digital conversion circuits are each controlled to operate at independently programmable sample rates.
Claim 5
Dependent Claim
132 words
A stereo audio coder-decoder (CODEC), comprising: (a) an analog mixer circuit having a plurality of inputs and outputs; (b) a digital-to-analog conversion circuit having at least one input and one output, wherein said at least one output of said digital-to-analog conversion circuit is connected to an input of said analog mixer circuit; (c) an analog-to-digital conversion circuit having at least one input and one output, wherein said at least one input of said analog-to-digital conversion circuit is connected to an output of said analog mixer circuit; (d) data format conversion circuitry connected to said at least one input of said digital-to-analog conversion circuit and to said at least one output of said analog-to-digital-conversion circuit; wherein said digital-to-analog and said analog-to-digital conversion circuits are each controlled to operate at independently programmable sample rates.
Claim 6
Dependent Claim
26 words
The CODEC of claim 3, further comprising on-chip memory for storing digital audio signals wherein said data format conversion circuitry is connected to said on-chip memory.
Claim 7
Dependent Claim
16 words
The CODEC of claim 3, wherein said digital-to-analog conversion circuit includes a multi-stage interpolation filter circuit.
Claim 8
Dependent Claim
17 words
The CODEC of claim 3, wherein said analog-to-digital conversion circuit includes a multi-stage digital decimation filter circuit.
Claim 9
Dependent Claim
32 words
The CODEC of claim 3, further comprising a clock generation circuit for selectably generating independent clock signals for controlling the sample rate at which said digital-to-analog circuit and said analog-to-digital circuit operate.
Claim 10
Dependent Claim
17 words
The CODEC of claim 4, further comprising a serial transfer control circuit connected to said on-chip memory.
Claim 11
Dependent Claim
26 words
The audio control circuit of claim 3, further comprising off-chip local memory for storing digital audio data samples to be input to said digital-to-analog conversion circuit.
Claim 12
Dependent Claim
19 words
The CODEC of claim 9, wherein a digital data path exists between said off-chip memory and an external DSP.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-07-14 | 2001-01-13 | 2001-07-15 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-07-14 | 2005-01-13 | 2005-07-15 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-07-14 | 2009-01-13 | 2009-07-15 | $7700.00 | Window Closed / Lapsed |