Patent US5633522A successfully refreshed from Google Patents.
US5633522A
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CMOS transistor with two-layer inverse-T tungsten gate
Assignee: International Business Machines Corp
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Filing: 1996-05-15
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Granted: 1997-05-27
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Expires: 2016-05-15
Abstract
Abstract The present invention is directed to a unique silicon based MOS transistor having an inverse-T refractory metal gate structure. The gate fabricated according to this invention comprises a main CVD tungsten portion and a lower sputtered tungsten portion outwardly extending from the bottom of the CVD portion such that a cross section of the gate appears as an inverted "T". A Cl 2 /O 2 plasma etch is used to etch the CVD tungsten layer and a chemical etch is used to etch the sputtered tungsten layer to form the gate electrode. It has been discovered that sputtered tungsten is more resistant to Cl 2 /O 2 reactive ion etch than is CVD tungsten. The sputtered tungsten layer acts as a shield to protect the underlying gate oxide layer from ion damage throughout the fabrication process.
Inventors
- 👤 Fernand Dorleans
- 👤 Liang-Choo Hsia
- 👤 Louis L. C. Hsu
- 👤 Gerald R. Larsen
- 👤 Geraldine C. Schwartz
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-30 08:26
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/01; H10D30/021; H10D30/0223; H10D64/00; H10D64/01; H10D64/013; H10D64/01302; H10D64/01304; H10D64/01316; H10D64/01324; H10D64/021; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/141; H10P32/1412; H10P32/17; H10P32/171; H10P50/00; H10P50/20; H10P50/26; H10P50/264; H10P50/266; H10P50/267; H10P50/60; H10P50/66; H10P50/663; H10P50/667
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
131 words
An MOS transistor with an inverted-T refractory metal gate, comprising in combination: a semiconductor substrate; a gate insulating layer on said semiconductor substrate; a first refractory metal layer formed on said insulating gate layer comprising a material formed to have a low density relative to the density of a second refractory metal layer; said second refractory metal layer formed on said first refractory metal layer comprising said material formed to have a high density relative to said low density of said first refractory metal layer; said first refractory metal layer extending laterally beyond said second refractory metal layer; and a source and drain region in said semiconductor substrate extending under said first refractory metal layer, wherein said first refractory metal layer and said second refractory metal layer comprise a same material.
Claim 2
Dependent Claim
131 words
An MOS transistor with an inverted-T refractory metal gate, comprising in combination: a semiconductor substrate; a gate insulating layer on said semiconductor substrate; a first refractory metal layer formed on said insulating gate layer comprising a material formed to have a low density relative to the density of a second refractory metal layer; said second refractory metal layer formed on said first refractory metal layer comprising said material formed to have a high density relative to said low density of said first refractory metal layer; said first refractory metal layer extending laterally beyond said second refractory metal layer; and a source and drain region in said semiconductor substrate extending under said first refractory metal layer, wherein said first refractory metal layer and said second refractory metal layer comprise a same material.
Claim 3
Dependent Claim
49 words
An MOS transistor with an inverted-T refractory metal gate as in claim 1, wherein said first refractory metal layer is formed by sputtering molybdenum onto said gate insulating layer and said second refractory metal layer is formed by chemical vapor deposition of molybdenum onto said first refractory metal layer.
Claim 4
Dependent Claim
49 words
An MOS transistor with an inverted-T refractory metal gate as in claim 1, wherein said first refractory metal layer is formed by sputtering tungsten onto said gate insulating layer and said second refractory metal layer is formed by chemical vapor deposition of tungsten onto said first refractory metal layer.
Claim 5
Dependent Claim
27 words
An MOS transistor with an inverted-T refractory metal gate as in claim 1, wherein said first refractory metal portion is thinner than said second refractory metal portion.
Claim 6
Dependent Claim
35 words
An MOS transistor with an inverted-T refractory metal gate as in claim 1, wherein said first refractory metal portion is between 450-550 Å thick and said second refractory metal portion is approximately 3500 Å thick.
Claim 7
Dependent Claim
64 words
An MOS transistor with an inverted-T refractory metal gate as in claim 1, further comprising: a first sidewall spacer surrounding said second refractory metal portion, said first refractory metal portion partially extending beneath said first sidewall space, a second sidewall spacer surrounding said first sidewall spacer, said second sidewall spacer partially extending beneath said first sidewall spacer and contacting said first refractory metal portion.
Claim 8
Dependent Claim
18 words
An MOS transistor with an inverted-T refractory metal gate as in claim 1, wherein said material comprises tungsten.
Claim 9
Dependent Claim
18 words
An MOS transistor with an inverted-T refractory metal gate as in claim 1, wherein said material comprises molybdenum.
Claim 10
Dependent Claim
41 words
An MOS transistor with an inverted-T refractory metal gate as in claim 1, wherein said first refractory metal layer has a first etch rate and said second refractory metal layer has a second etch rate different than said first etch rate.
Claim 11
Dependent Claim
25 words
An MOS transistor with an inverted-T refractory metal gate as in claim 9, wherein said first etch rate is less than said second etch rate.
Claim 12
Dependent Claim
55 words
An MOS transistor with an inverted-T refractory metal gate as in claim 9, wherein said first refractory metal layer has a first etch rate and said second refractory metal layer has said second etch rate when said first refractory metal layer and said second refractory metal layer are being etched with a single etch process.
Claim 13
Dependent Claim
27 words
An MOS transistor with an inverted-T refractory metal gate as in claim 11, wherein said single etch process comprises a Cl 2 /O 2 reactive ion etch.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 2000-05-26 | 2000-11-25 | 2001-05-27 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2004-05-26 | 2004-11-25 | 2005-05-27 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2008-05-26 | 2008-11-25 | 2009-05-27 | $7700.00 | Window Closed / Lapsed |