Process for polysilicon thin film transistors using backside irradiation and plasma doping

Claim 1

A process for manufacturing a thin film transistor comprising: (a) providing a dielectric substrate, having front and rear surfaces, that is transparent to actinic radiation; (b) depositing a first metallic layer on said front surface and then patterning and etching the metallic layer to form a gate; (c) depositing an insulating layer on said gate and said front surface; (d) depositing a layer of undoped amorphous silicon on said insulating layer; (e) coating so as to contact said layer of undoped amorphous silicon with a layer of positive photoresist and then exposing the photoresist to actinic radiation directed to first pass through said rear surface and insulating layer, then through the layer of amorphous silicon and then through the photoresist, said gate acting as an optical mask; (f) developing the layer of photoresist, thereby forming a photoresist mask that is in exact alignment with the gate; (g) exposing the photoresist mask and the layer of amorphous silicon to a gaseous plasma that includes dopant material, thereby forming doped sublayers, in the amorphous silicon, that do not overlap the gate; (h) removing the photoresist mask and then laser annealing the entire amorphous silicon layer, including said doped sublayers, whereby said layer of amorphous silicon crystallizes into polysilicon, said doped sublayers grow thicker and the dopants are activated; (i) depositing a second metallic layer on said polysilicon layer and then patterning and etching said second metallic layer so that it does not overlap the gate; (k) coating the polysilicon and second metallic layers with a passivation layer; and (l) etching and forming bonding pads through said passivation layer, to the level of said second metallic layer.