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US5530265A Expired / Lapsed US ⏱️ 0.0 years remaining

Insulated gate semiconductor device and process for fabricating the same

Assignee: Semiconductor Energy Laboratory Co Ltd
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Filing: 1994-08-05
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Granted: 1996-06-25
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Expires: 2014-08-05
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Abstract

Abstract A thin film transistor of reversed stagger type having improved characteristics and yet obtained by a simple process, which is fabricated by selectively doping the semiconductor region on the gate dielectric to form the source, drain, and channel forming regions by using ion implantation, ion doping, or doping a plasma of ions; and then effecting rapid thermal annealing by irradiating a ultraviolet radiation, a visible light, or a near-infrared radiation for a short period of time. The source, drain, and channel forming regions are formed substantially within a single plane.

Inventors

  • 👤 Yasuhiko Takemura

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-09 02:35
CPC Classifications
H; H10; H10D; H10D30/00; H10D30/60; H10D30/67; H10D30/01; H10D30/021; H10D30/031; H10D30/0312; H10D30/0316; H10D30/0321; H10D30/6729; H10D30/673; H10D30/6731; H10D30/6732; H10D30/674; H10D30/6741; H10D30/6743; H10D30/6745; H10D30/6746; H10P; H10P10/00

Claims Analysis

Total Claims: 29
Claim 1
Independent Claim 85 words
An insulated gate reverse staggered type MIS semiconductor device provided on an insulating substrate, said insulated gate semiconductor device comprising: a channel forming region made substantially from an intrinsic amorphous semiconductor; and source and drain regions made of an N-type or P-type semiconductor having a structural degree of ordering higher than that of said amorphous semiconductor as observed by a peak in Raman scattering spectra; wherein an ultraviolet radiation, a visible light, or a near infrared radiation is irradiated to said N-type or P-type semiconductor.
Claim 2
Dependent Claim 85 words
An insulated gate reverse staggered type MIS semiconductor device provided on an insulating substrate, said insulated gate semiconductor device comprising: a channel forming region made substantially from an intrinsic amorphous semiconductor; and source and drain regions made of an N-type or P-type semiconductor having a structural degree of ordering higher than that of said amorphous semiconductor as observed by a peak in Raman scattering spectra; wherein an ultraviolet radiation, a visible light, or a near infrared radiation is irradiated to said N-type or P-type semiconductor.
Claim 3
Dependent Claim 27 words
The insulated gate semiconductor device of claim 1 further comprising a gate electrode coated with an insulator comprising an oxide of a material constituting said gate electrode.
Claim 4
Dependent Claim 14 words
The insulated gate semiconductor device of claim 1 wherein said gate electrode comprises tantalum.
Claim 5
Dependent Claim 31 words
The insulated gate semiconductor device of claim 1 wherein said N-type or P-type semiconductor comprises a crystalline semiconductor which exhibits structural ordering as observed by a peak in Raman scattering spectra.
Claim 6
Dependent Claim 31 words
The insulated gate semiconductor device of claim 1 wherein said N-type or P-type semiconductor is heated by the irradiation of said ultraviolet radiation, said visible light, or said near infrared radiation.
Claim 7
Dependent Claim 25 words
The insulated gate Semiconductor device of claim 1 wherein said channel forming region and said source and drain regions are provided in one semiconductor film.
Claim 8
Dependent Claim 19 words
The insulated gate semiconductor device of claim 6 wherein said one semiconductor film comprises two or more semiconductor layers.
Claim 9
Dependent Claim 32 words
The insulated gate semiconductor device of claim 1 wherein wavelength of 4 to 0.5 μm is used for the irradiation of said ultraviolet radiation, said visible light, or said near infrared radiation.
Claim 10
Dependent Claim 38 words
The insulated gate semiconductor device of claim 1 wherein said structural degree of ordering higher than that of said amorphous semiconductor is caused by the irradiation of said ultraviolet radiation, said visible light, or said near infrared radiation.
Claim 11
Dependent Claim 25 words
The insulated gate semiconductor device of claim 2 wherein said insulator comprising the oxide of the material constituting said gate electrode comprises an anodic oxide.
Claim 12
Dependent Claim 86 words
A process for fabricating an insulated gate semiconductor device comprising the steps of: forming a gate electrode on a substrate; forming a gate insulating film on said gate electrode; forming an amorphous or a polycrystalline semiconductor film on said gate insulating film; providing a masking material on said semiconductor film; introducing an impurity into said semiconductor film using said masking material as a mask; and imparting structural ordering to said semiconductor film by irradiating thereto an ultraviolet radiation, a visible light, or a near infrared radiation.
Claim 13
Dependent Claim 86 words
A process for fabricating an insulated gate semiconductor device comprising the steps of: forming a gate electrode on a substrate; forming a gate insulating film on said gate electrode; forming an amorphous or a polycrystalline semiconductor film on said gate insulating film; providing a masking material on said semiconductor film; introducing an impurity into said semiconductor film using said masking material as a mask; and imparting structural ordering to said semiconductor film by irradiating thereto an ultraviolet radiation, a visible light, or a near infrared radiation.
Claim 14
Dependent Claim 18 words
The process of claim 11 wherein source, drain and channel forming regions are formed in said semiconductor film.
Claim 15
Dependent Claim 23 words
The process of claim 11 wherein said ultraviolet radiation, said visible light, or said near infrared radiation is absorbed by said semiconductor film.
Claim 16
Dependent Claim 29 words
The process of claim 11 wherein wavelength of 0.5 to 4 μm is used for the irradiation of said ultraviolet radiation, said visible light, or said near infrared radiation.
Claim 17
Dependent Claim 21 words
The process of claim 11 wherein said substrate is heated at a temperature of 250° to 500° C. during said irradiating.
Claim 18
Dependent Claim 98 words
A process for fabricating an insulated gate semiconductor device comprising the steps of: forming a gate electrode on a substrate; forming a gate insulating film on said gate electrode; forming an amorphous or a polycrystalline semiconductor film on said gate insulating film; providing a masking material on said semiconductor film; introducing an impurity into said semiconductor film using said masking material as a mask; and rendering at least a portion of said semiconductor film either P-type or N-type conductive by irradiating an ultraviolet radiation, a visible light, or a near infrared radiation thereto according to said introduced impurity.
Claim 19
Dependent Claim 98 words
A process for fabricating an insulated gate semiconductor device comprising the steps of: forming a gate electrode on a substrate; forming a gate insulating film on said gate electrode; forming an amorphous or a polycrystalline semiconductor film on said gate insulating film; providing a masking material on said semiconductor film; introducing an impurity into said semiconductor film using said masking material as a mask; and rendering at least a portion of said semiconductor film either P-type or N-type conductive by irradiating an ultraviolet radiation, a visible light, or a near infrared radiation thereto according to said introduced impurity.
Claim 20
Dependent Claim 18 words
The process of claim 16 wherein source, drain and channel forming regions are formed in said semiconductor film.
Claim 21
Dependent Claim 23 words
The process of claim 16 wherein said ultraviolet radiation, said visible light, or said near infrared radiation is absorbed by said semiconductor film.
Claim 22
Dependent Claim 29 words
The process of claim 16 wherein wavelength of 0.5 to 4 μm is used for the irradiation of said ultraviolet radiation, said visible light, or said near infrared radiation.
Claim 23
Dependent Claim 21 words
The process of claim 16 wherein said substrate is heated at a temperature of 250° to 500° C. during said irradiating.
Claim 24
Independent Claim 80 words
A method for manufacturing a semiconductor device comprising the steps of: forming a gate electrode on a substrate; forming a gate insulating layer on said gate electrode; forming a semiconductor film over said gate electrode, with said gate insulating layer interposed therebetween; forming source and drain regions in said semiconductor film by introducing an impurity into a portion of said semiconductor film; and irradiating an ultraviolet radiation, a visible light, or a near infrared radiation to activate said introduced impurity.
Claim 25
Independent Claim 80 words
A method for manufacturing a semiconductor device comprising the steps of: forming a gate electrode on a substrate; forming a gate insulating layer on said gate electrode; forming a semiconductor film over said gate electrode, with said gate insulating layer interposed therebetween; forming source and drain regions in said semiconductor film by introducing an impurity into a portion of said semiconductor film; and irradiating an ultraviolet radiation, a visible light, or a near infrared radiation to activate said introduced impurity.
Claim 26
Dependent Claim 102 words
An insulated gate reverse staggered type MIS semiconductor device provided on an insulating substrate, said insulated gate semiconductor device comprising: a channel forming region made substantially from an intrinsic amorphous semiconductor; and source and drain regions made of an N-type or P-type semiconductor having a structural degree of ordering higher than that of said amorphous semiconductor as observed by a peak in Raman scattering spectra, wherein said channel forming region and said source and drain regions are provided in one semiconductor film, and an ultraviolet radiation, a visible light or a near infrared radiation is irradiated to said N-type or P-type semiconductor.
Claim 27
Dependent Claim 102 words
An insulated gate reverse staggered type MIS semiconductor device provided on an insulating substrate, said insulated gate semiconductor device comprising: a channel forming region made substantially from an intrinsic amorphous semiconductor; and source and drain regions made of an N-type or P-type semiconductor having a structural degree of ordering higher than that of said amorphous semiconductor as observed by a peak in Raman scattering spectra, wherein said channel forming region and said source and drain regions are provided in one semiconductor film, and an ultraviolet radiation, a visible light or a near infrared radiation is irradiated to said N-type or P-type semiconductor.
Claim 28
Dependent Claim 83 words
An insulated gate reverse staggered type MIS semiconductor device provided on an insulating substrate, said insulated gate semiconductor device comprising: a channel forming region made substantially from an intrinsic amorphous semiconductor; and source and drain regions made of an N-type or P-type semiconductor having a structural degree of ordering higher than that of said amorphous semiconductor as observed by a peak in Raman scattering spectra, wherein light having a wavelength of 4 to 0.5 μm is irradiated to said N-type or P-type semiconductor.
Claim 29
Dependent Claim 83 words
An insulated gate reverse staggered type MIS semiconductor device provided on an insulating substrate, said insulated gate semiconductor device comprising: a channel forming region made substantially from an intrinsic amorphous semiconductor; and source and drain regions made of an N-type or P-type semiconductor having a structural degree of ordering higher than that of said amorphous semiconductor as observed by a peak in Raman scattering spectra, wherein light having a wavelength of 4 to 0.5 μm is irradiated to said N-type or P-type semiconductor.

References Cited (Backward Citations)

US4377421A Cited
US5329140A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-06-25 1999-12-25 2000-06-25 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-06-25 2003-12-25 2004-06-25 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-06-25 2007-12-25 2008-06-25 $7700.00 Window Closed / Lapsed

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