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US5567654A Expired / Lapsed US ⏱️ 0.0 years remaining

Method and workpiece for connecting a thin layer to a monolithic electronic module's surface and associated module packaging

Assignee: International Business Machines Corp
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Filing: 1994-09-28
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Granted: 1996-10-22
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Expires: 2014-09-28
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Abstract

Abstract A fabrication method and resultant monolithic electronic module having a separately formed thin-film layer attached to a side surface. The fabrication method includes providing an electronic module composed of stacked integrated circuit chips. A thin-film layer is separately formed on a temporary support which is used to attach the thin-film layer to the electronic module. The disclosed techniques may also be used for attaching an interposer, which may include active circuity, to an electronic module. Specific details of the fabrication method, resulting multichip packages, and various thin-film structures are set forth.

Inventors

  • 👤 Kenneth E. Beilstein, Jr.
  • 👤 Claude L. Bertin
  • 👤 John E. Cronin
  • 👤 Wayne J. Howell
  • 👤 James M. Leas
  • 👤 David J. Perlman

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-03 12:16
CPC Classifications
H; H10; H10W; H10W90/00; H10W70/00; H10W70/60; H10W70/62; H10W70/63; H10W70/635; H10W70/67; H10W70/68; H10W70/682; H10W72/00; H10W72/071; H10W72/075; H10W72/07551; H10W72/07554; H10W72/50; H10W72/541; H10W72/547; H10W72/834; H10W72/851; H10W72/874; H10W72/884; H10W90/20; H10W90/22; H10W90/288; H10W90/291; H10W90/297; H10W90/701; H10W90/721; H10W90/722; H10W90/724; H10W90/731; H10W90/732; H10W90/734; H10W90/751; H10W90/754

Claims Analysis

Total Claims: 63
Claim 1
Independent Claim 146 words
A method for establishing a thin-film layer on a semiconductor structure having a planar surface, said thin-film layer comprising a metallization layer, said semiconductor structure comprising a plurality of stacked integrated circuit (IC) chips having a plurality of edge surfaces that at least partially define said planar surface of said semiconductor structure, said method comprising the steps of: (a) forming the metallization layer in association with a temporary support separate from the semiconductor structure; (b) electrically coupling the metallization layer to the planar surface of the semiconductor structure such that said metallization layer physically bonds to said planar surface and said temporary support is coupled to said semiconductor structure, wherein said metallization layer electrically connects to said semiconductor structure; and (c) decoupling the temporary support from said semiconductor structure, said metallization layer remaining electrically coupled and physically bonded to said planar surface of the semiconductor structure.
Claim 2
Independent Claim 146 words
A method for establishing a thin-film layer on a semiconductor structure having a planar surface, said thin-film layer comprising a metallization layer, said semiconductor structure comprising a plurality of stacked integrated circuit (IC) chips having a plurality of edge surfaces that at least partially define said planar surface of said semiconductor structure, said method comprising the steps of: (a) forming the metallization layer in association with a temporary support separate from the semiconductor structure; (b) electrically coupling the metallization layer to the planar surface of the semiconductor structure such that said metallization layer physically bonds to said planar surface and said temporary support is coupled to said semiconductor structure, wherein said metallization layer electrically connects to said semiconductor structure; and (c) decoupling the temporary support from said semiconductor structure, said metallization layer remaining electrically coupled and physically bonded to said planar surface of the semiconductor structure.
Claim 3
Dependent Claim 23 words
The method of claim 1, wherein said forming step (a) includes associating said thin-film layer with said temporary support via a temporary adhesive.
Claim 4
Dependent Claim 41 words
The method of claim 1, wherein said forming step (a) includes forming said thin-film layer on a first surface of a substrate, said substrate being coupled to said temporary support such that said thin-film layer is associated with said temporary support.
Claim 5
Dependent Claim 43 words
The method of claim 1, wherein said forming step (a) includes forming said thin-film layer on a first surface of a passive film, said passive film being coupled to said temporary support such that said thin-film layer is associated with said temporary support.
Claim 6
Dependent Claim 42 words
The method of claim 1, wherein said electrically coupling step (b) includes electrically coupling the metallization layer to the planar surface of the semiconductor structure such that said metallization layer electrically interconnects at least some of said plurality of stacked IC chips.
Claim 7
Dependent Claim 59 words
The method of claim 5, wherein said planar surface of said semiconductor structure has a plurality of balancing pads thereon, and wherein said electrically coupling step (b) includes mechanically bonding said metallization layer to said planar surface of said semiconductor structure such that said plurality of stacked integrated circuit chips is partially supported by said plurality of balancing pads.
Claim 8
Dependent Claim 91 words
The method of claim 5, wherein each integrated circuit chip of said plurality of stacked integrated circuit chips has a spacer disposed between itself and an adjacent integrated circuit chip of said plurality of stacked integrated circuit chips comprising said semiconductor structure, and wherein said planar surface of said semiconductor structure has a plurality of balancing pads thereon, said electrically coupling step (b) including mechanically bonding said metallization layer to said planar surface such that said plurality of stacked integrated circuit chips are partially supported by said plurality of balancing pads.
Claim 9
Dependent Claim 19 words
The method of claim 7, further comprising the step of removing said spacer after said electrical coupling step (b).
Claim 10
Dependent Claim 30 words
The method of claim 1, wherein said forming step (a) includes forming said thin-film layer to have a first plurality of electrical contacts for facilitating said electrically coupling step (b).
Claim 11
Dependent Claim 48 words
The method of claim 9, wherein said planar surface of said semiconductor structure has a second plurality of electrical contacts thereon, and wherein said electrically coupling step (b) includes electrically connecting at least some of said first plurality of electrical contacts to said second plurality of electrical contacts.
Claim 12
Dependent Claim 36 words
The method of claim 10, wherein said electrically coupling step (b) includes insulating a first electrical contact of said first plurality of electrical contacts from a first electrical contact of said second plurality of electrical contacts.
Claim 13
Dependent Claim 28 words
The method of claim 11, wherein said electrically coupling step (b) includes depositing an insulating layer over said first electrical contact of said first plurality of electrical contacts.
Claim 14
Dependent Claim 21 words
The method of claim 12, wherein said electrically coupling step (b) includes depositing a second electrical contact over said insulating layer.
Claim 15
Dependent Claim 42 words
The method of claim 11, wherein said electrically coupling step (b) includes depositing a plurality of solder bumps on said first plurality of electrical contacts and removing a solder bump from said first electrical contact of said first plurality of electrical contacts.
Claim 16
Dependent Claim 91 words
The method of claim 1, wherein said forming step (a) includes forming said thin-film layer as a metallization layer on a substrate having a first surface and a second surface such that said metallization layer is disposed on said first surface, said substrate including an active circuit layer disposed on said second surface, said substrate being coupled to said temporary support such that said metallization layer is associated with said temporary support, and wherein said electrically coupling step (b) further comprises electrically coupling said active circuit layer to the semiconductor structure.
Claim 17
Dependent Claim 32 words
The method of claim 15, wherein said forming step (a) includes providing said substrate with a plurality of electrically conductive vias that electrically connect said metallization layer and said active circuit layer.
Claim 18
Dependent Claim 36 words
The method of claim 15, wherein said forming step (a) includes forming said active circuit layer to have a plurality of electrical contacts for facilitating electrical contact thereof to a circuit external from said electronic module.
Claim 19
Dependent Claim 95 words
The method of claim 1, wherein said forming step (a) includes forming said thin-film layer as a first metallization layer on a passive film having a first surface and a second surface such that said first metallization layer is disposed on said first surface, said passive film including a second metallization layer disposed on said second surface and being coupled to said temporary support such that said first metallization layer is associated with said temporary support, and wherein said electrically coupling step (b) further comprises electrically coupling said second metallization layer to the semiconductor structure.
Claim 20
Dependent Claim 34 words
The method of claim 18, wherein said forming step (a) includes providing said passive film with a plurality of electrically conductive vias that electrically connect said first metallization layer and said second metallization layer.
Claim 21
Dependent Claim 35 words
The method of claim 18, wherein said forming step (a) includes forming said second metallization layer to have a plurality of electrical contacts for facilitating electrical contact to a circuit external from said electronic module.
Claim 22
Dependent Claim 50 words
The method of claim 1, wherein said planar surface of said plurality of stacked IC chips is free of interconnections between the plurality of stacked IC chips formed thereon, such that said plurality of stacked IC chips are not electrically connected to each other until said electrically coupling step (b).
Claim 23
Independent Claim 267 words
A method for establishing a metallization layer on a side surface of an electronic module, said electronic module comprising a plurality of stacked integrated circuit chips having a plurality of edge surfaces that at least partially define the side surface of the electronic module, said method comprising the steps of: (a) forming a metallization layer on a first surface of a substrate, said substrate having said first surface, a second surface, and a plurality of electrically conductive vias extending between said first surface and said second surface, said substrate further including an active circuit layer disposed on said second surface and a plurality of electrical contacts for facilitating electrical contact to a circuit external to said electronic module, said metallization layer and said active circuit layer being electrically connected by said plurality of electrically conductive vias; (b) coupling said metallization layer to a temporary support via a temporary adhesive layer, wherein said steps (a) and (b) are performed physically independent from the electronic module; (c) electrically coupling the metallization layer to the side surface of the electronic module such that said metallization layer mechanically bonds to said side surface and said temporary support is coupled to said electronic module, wherein said metallization layer at least partially interconnects said plurality of stacked integrated circuit chips comprising said electronic module; and (d) detaching the temporary support from said electronic module along the temporary adhesive layer, wherein said metallization layer remains bonded to said side surface of the electronic module and said substrate and said active circuit layer having said plurality of electrical contacts remains coupled to said electronic module.
Claim 24
Independent Claim 267 words
A method for establishing a metallization layer on a side surface of an electronic module, said electronic module comprising a plurality of stacked integrated circuit chips having a plurality of edge surfaces that at least partially define the side surface of the electronic module, said method comprising the steps of: (a) forming a metallization layer on a first surface of a substrate, said substrate having said first surface, a second surface, and a plurality of electrically conductive vias extending between said first surface and said second surface, said substrate further including an active circuit layer disposed on said second surface and a plurality of electrical contacts for facilitating electrical contact to a circuit external to said electronic module, said metallization layer and said active circuit layer being electrically connected by said plurality of electrically conductive vias; (b) coupling said metallization layer to a temporary support via a temporary adhesive layer, wherein said steps (a) and (b) are performed physically independent from the electronic module; (c) electrically coupling the metallization layer to the side surface of the electronic module such that said metallization layer mechanically bonds to said side surface and said temporary support is coupled to said electronic module, wherein said metallization layer at least partially interconnects said plurality of stacked integrated circuit chips comprising said electronic module; and (d) detaching the temporary support from said electronic module along the temporary adhesive layer, wherein said metallization layer remains bonded to said side surface of the electronic module and said substrate and said active circuit layer having said plurality of electrical contacts remains coupled to said electronic module.
Claim 25
Independent Claim 79 words
A method for forming an electronic package comprising the steps of: (a) providing an electronic module comprising a plurality of stacked integrated circuit chips and having a planar side surface; (b) providing an interposer comprising a first planar main surface and an active circuit layer; and (c) electrically coupling said planar side surface of said electronic module to said first planar main surface of said interposer such that said active circuit layer functions in conjunction with the electronic module.
Claim 26
Independent Claim 79 words
A method for forming an electronic package comprising the steps of: (a) providing an electronic module comprising a plurality of stacked integrated circuit chips and having a planar side surface; (b) providing an interposer comprising a first planar main surface and an active circuit layer; and (c) electrically coupling said planar side surface of said electronic module to said first planar main surface of said interposer such that said active circuit layer functions in conjunction with the electronic module.
Claim 27
Dependent Claim 43 words
The method of claim 23, wherein said interposer includes an extending portion that extends beyond said side surface of said electronic module when coupled thereto, said method including encapsulating said electronic module, said encapsulating being performed to said extending portion of said interposer.
Claim 28
Dependent Claim 18 words
The method of claim 24, wherein said encapsulating of said electronic module comprises hermetically sealing said electronic module.
Claim 29
Dependent Claim 21 words
The method of claim 23, wherein said providing step (a) comprises firming said planar side surface without use of lithography steps.
Claim 30
Dependent Claim 19 words
The method of claim 23, further including the step of attaching a thermal management device to the electronic package.
Claim 31
Independent Claim 100 words
A method for forming an electronic package comprising the steps of: (a) providing an electronic module comprising a plurality of stacked integrated circuit chips, said electronic module having a planar surface; (b) providing a cavity substrate having a cavity therein; (c) providing an active integrated circuit chip; and (d) mechanically coupling said active integrated circuit chip and said electronic module to said cavity substrate such that said electronic module and said active integrated circuit chip are recessed within said cavity and said active integrated circuit chip is disposed between said cavity substrate and said planar surface of said electronic module.
Claim 32
Independent Claim 100 words
A method for forming an electronic package comprising the steps of: (a) providing an electronic module comprising a plurality of stacked integrated circuit chips, said electronic module having a planar surface; (b) providing a cavity substrate having a cavity therein; (c) providing an active integrated circuit chip; and (d) mechanically coupling said active integrated circuit chip and said electronic module to said cavity substrate such that said electronic module and said active integrated circuit chip are recessed within said cavity and said active integrated circuit chip is disposed between said cavity substrate and said planar surface of said electronic module.
Claim 33
Dependent Claim 15 words
The method of claim 28, further including the step of thermally managing said electronic module.
Claim 34
Dependent Claim 23 words
The method of claim 28, further including the step of encapsulating the electronic package, for protecting said electronic package from a surrounding environment.
Claim 35
Dependent Claim 20 words
The method of claim 28, further including the steps of connecting a means for thermal management to said electronic module.
Claim 36
Dependent Claim 20 words
The method of claim 28, further including the step of electrically connecting the substrate and the active integrated circuit chip.
Claim 37
Dependent Claim 18 words
The method of claim 28, further including the step of electrically connecting the substrate and the electronic module.
Claim 38
Dependent Claim 48 words
The method of claim 28, wherein said substrate includes a plurality of wirebond pads disposed on a plurality of wirebond pad levels, said method further including the step of electrically attaching said wirebond pads to at least one of said active integrated circuit chip and said electronic module.
Claim 39
Dependent Claim 39 words
The method of claim 28, further including the step of depositing a thin-film metallization layer between said electronic module and said active integrated circuit chip for electrically interconnecting at least some of the plurality of stacked integrated circuit chips.
Claim 40
Independent Claim 72 words
A method for forming an electronic package comprising the steps of: (a) providing a cavity substrate having a cavity therein; (b) providing a first semiconductor structure within said cavity and providing a second semiconductor structure; (c) mechanically coupling said cavity substrate, said first semiconductor structure and said second semiconductor structure such that said cavity substrate and said first semiconductor structure comprise a planar surface to which said second semiconductor structure is coupled.
Claim 41
Independent Claim 72 words
A method for forming an electronic package comprising the steps of: (a) providing a cavity substrate having a cavity therein; (b) providing a first semiconductor structure within said cavity and providing a second semiconductor structure; (c) mechanically coupling said cavity substrate, said first semiconductor structure and said second semiconductor structure such that said cavity substrate and said first semiconductor structure comprise a planar surface to which said second semiconductor structure is coupled.
Claim 42
Dependent Claim 15 words
The method of claim 36, further including the step of thermally managing said electronic package.
Claim 43
Dependent Claim 19 words
The method of claim 36, further including the step of electrically attaching said first semiconductor structure and said substrate.
Claim 44
Dependent Claim 19 words
The method of claim 36, further including the step of electrically attaching said second semiconductor structure and said substrate.
Claim 45
Dependent Claim 65 words
The method of claim 36, wherein said second semiconductor structure includes a first portion and a second portion coplanar with said first portion, said method further including the steps of: electrically attaching and mechanically bonding said first portion of said second semiconductor structure to said substrate, and electrically attaching and mechanically bonding said second portion of said second semiconductor structure to said first semiconductor structure.
Claim 46
Independent Claim 68 words
A method for forming an electronic package comprising the steps of: (a) providing an electronic module comprising a plurality of stacked integrated circuit chips, said electronic module having a planar surface; (b) providing a cavity substrate having both a cavity and an opening therein; and (c) mechanically coupling the planar surface of the electronic module to the cavity substrate, wherein said electronic module is recessed within said cavity.
Claim 47
Independent Claim 68 words
A method for forming an electronic package comprising the steps of: (a) providing an electronic module comprising a plurality of stacked integrated circuit chips, said electronic module having a planar surface; (b) providing a cavity substrate having both a cavity and an opening therein; and (c) mechanically coupling the planar surface of the electronic module to the cavity substrate, wherein said electronic module is recessed within said cavity.
Claim 48
Dependent Claim 18 words
The method of claim 41, further including the step of electrically attaching said electronic module to said substrate.
Claim 49
Dependent Claim 43 words
The method of claim 41, further including the step of electrically coupling and mechanically bonding an active integrated circuit chip to the planar surface of the electronic module, wherein said active integrated circuit chip is located within said opening and accessible for maintenance.
Claim 50
Dependent Claim 34 words
The method of claim 43, further including the step of thermally coupling a means for thermal management to said active integrated circuit chip, wherein said means for thermal management is located within said opening.
Claim 51
Dependent Claim 28 words
The method of claim 44, further including the step of sealing said means for thermal management to said substrate for protecting the electronic module from an external environment.
Claim 52
Dependent Claim 30 words
The method of claim 43, further in combination with a method for repairing the electronic package, including the step of removing said active integrated circuit chip from said electronic package.
Claim 53
Independent Claim 96 words
A method for forming a computer unit comprising the steps of: (a) providing a processor chip having a planar main surface, said processor chip including a cache memory controller; (b) providing a first electronic module comprising a plurality of stacked integrated circuit (IC) chips and having a first planar surface, said first electronic module including a cache memory circuit; and (c) mechanically and electrically coupling the first planar surface of the first electronic module to the planar surface of the processor chip such that the cache memory controller is electrically connected to the cache memory circuit.
Claim 54
Independent Claim 96 words
A method for forming a computer unit comprising the steps of: (a) providing a processor chip having a planar main surface, said processor chip including a cache memory controller; (b) providing a first electronic module comprising a plurality of stacked integrated circuit (IC) chips and having a first planar surface, said first electronic module including a cache memory circuit; and (c) mechanically and electrically coupling the first planar surface of the first electronic module to the planar surface of the processor chip such that the cache memory controller is electrically connected to the cache memory circuit.
Claim 55
Dependent Claim 60 words
The method of claim 47, wherein said providing step (b) includes providing the first electronic module with a second planar surface, said second planar surface having a first plurality of electrical contacts thereon, at least some electrical contacts of said first plurality of electrical contacts being electrically coupled to said processor chip for facilitating electrical contact to said processor chip.
Claim 56
Dependent Claim 47 words
The method of claim 48, wherein said computer unit includes a second processor chip having a planar main surface, and wherein said method includes mechanically and electrically coupling the planar main surface of the second processor chip to the second planar surface of the first electronic module.
Claim 57
Dependent Claim 108 words
The method of claim 48, wherein the providing step (b) further comprises providing a bussing chip within the plurality of stacked IC chips of the first electronic module, said bussing chip having a first edge surface parallel with the first planar surface of the first electronic module, and a second edge surface parallel with the second planar surface of the first electronic module, and wherein said bussing chip electrically connects the processor chip coupled to the first planar surface of the first electronic module to the at least some electrical contacts of the first plurality of electrical contacts coupled to the second planar surface of the electronic module.
Claim 58
Dependent Claim 74 words
The method of claim 48, wherein the computer unit includes an interposer substrate having a planar main surface, and wherein said method includes mechanically coupling the planar main surface of the interposer substrate to the second planar surface of the first electronic module such that said interposer substrate electrically attaches to the first plurality of electrical contacts and at least partially electrically interconnects the plurality of stacked IC chips of the first electronic module.
Claim 59
Dependent Claim 96 words
The method of claim 48, wherein said computer unit includes a second electronic module comprising a plurality of stacked IC chips and having a first planar surface, said second electronic module including a second memory circuit, and wherein said method further comprises mechanically coupling the first planar surface of the second electronic module to the second planar surface of the first electronic module such that the first electronic module and second electronic module are electrically coupled via the first plurality of electrical contacts such that the second electronic module is electrically coupled to the processor chip.
Claim 60
Dependent Claim 98 words
The computer unit of claim 52, wherein the second electronic module has a second planar surface, said second planar surface having a second plurality of electrical contacts thereon, and wherein said step of mechanically coupling the first planar surface of the second electronic module to the second planar surface of the first electronic module includes electrically coupling at least some of said electrical contacts of said second plurality of electrical contacts through said at least some electrical contacts of said first electronic module to said processor chip, for providing electrical contact to devices associated with said computer unit.
Claim 61
Dependent Claim 77 words
The computer unit of claim 53, wherein said computer unit includes a main memory controller chip having a planar main surface, and wherein said method includes mechanically coupling the planar main surface of the main memory controller chip to the second planar surface of the second electronic module such that said main memory controller chip is electrically coupled to the at least some electrical contacts of the second plurality of electrical contacts of the second electronic module.
Claim 62
Dependent Claim 127 words
The computer unit of claim 54, wherein the plurality of stacked IC chips of the second electronic module includes a bussing chip, said bussing chip having a first edge surface parallel with the first planar surface of the second electronic module, and a second edge surface parallel with the second planar surface of the second electronic module, and wherein said step of mechanically coupling the first planar surface of the second electronic module to the second planar surface of the first electronic module includes electrically connecting the at least some electrical contacts of the first plurality of electrical contacts of the first electronic module to the at least some electrical contacts of the second plurality of electrical contacts of the second electronic module using said bussing chip.
Claim 63
Dependent Claim 41 words
The computer unit of claim 47, wherein said providing step (b) includes providing a first electronic module having a main memory circuit, said electrical coupling step (c) being such that the main memory circuit functions in association with the processor chip.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-10-22 2000-04-22 2000-10-22 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-10-22 2004-04-22 2004-10-22 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-10-22 2008-04-22 2008-10-22 $7700.00 Window Closed / Lapsed

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