US5397747A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Vertical chip mount memory package and method
Assignee: International Business Machines Corp
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Filing: 1993-11-02
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Granted: 1995-03-14
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Expires: 2013-11-02
Abstract
Abstract A packaging substrate (10) is populated with memory chip cube(s) (40) and horizontally mounted interconnect chip(s) (19) mounted on the substrate which are joined during assembly using two kinds of lead tin solder alloys to form memory chip cube. One is a high melting point lead tin alloy (HMA), the other is a lower melting point lead tin alloy (LMA). The memory chip pairs (11) of the memory cube are formed by placing functional memory chips over another functional memory chips before they were diced. The chip pads of the individual memory chips and the lead tin pads of the memory chips within the wafer are aligned and the high melting point lead tin solder is reflowed, forming memory chip pairs. The memory cube (42) is formed by joining the memory chip pairs together in a boat (30) with a silicon bar (41) maintaining spacing during manufacture. The memory chip cube (42) as well as the supporting chips are then placed and joined to the packaging substrate. The supporting silicon bar is removed from the memory chip cube (42) by re-heating the cube after it is joined to the packaging substrate. The package is completed by following with capping of the chip package of the paired memory chip cube with its attached packaging substrate by attaching to the base member substrate an appropriate heat sink after appropriate I/O flex lines are in place.
Inventors
- 👤 John M. Angiulli
- 👤 Eugene S. Kolankowsky
- 👤 Richard R. Konian
- 👤 Leon L. Wu
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-03 02:14
CPC Classifications
H; H10; H10W; H10W90/00; Y; Y10; Y10T; Y10T29/00; Y10T29/49; Y10T29/49002; Y10T29/49117; Y10T29/49124; Y10T29/4913; Y10T29/49144
Claims Analysis
Total Claims: 5
Claim 1
Independent Claim
195 words
A method of assembling the memory chip cube package, comprising the steps of: fabricating a memory chip pairs for a cube; assembling a plurality of memory chip pairs into a memory chip cube; assembling the memory chip cube as part of a package containing a packaging wiring base substrate having a planar surface and having a plurality of bonding interconnect pads located on its surface, at least one interconnection chip horizontally mounted on said planar surface and disposed horizontally and parallel to the surface with interconnection to selected interconnect pads, said memory chip cube mounted on the planar surface of the base substrate and electrically connected and mechanically bonded to selected interconnect pads located on its surface, said memory chip cube having said memory chip pairs disposed vertically and normal to the surface of said base substrate in close spacing between one another in the form of said memory chip cube mounted on the packaging wiring substrate, and having a plurality of interconnections between said interconnect pads located to interconnect said interconnection chip and said memory chip pairs; and enclosing said interconnection chips and memory cube by an enclosure covering mounted on said base substrate.
Claim 2
Independent Claim
195 words
A method of assembling the memory chip cube package, comprising the steps of: fabricating a memory chip pairs for a cube; assembling a plurality of memory chip pairs into a memory chip cube; assembling the memory chip cube as part of a package containing a packaging wiring base substrate having a planar surface and having a plurality of bonding interconnect pads located on its surface, at least one interconnection chip horizontally mounted on said planar surface and disposed horizontally and parallel to the surface with interconnection to selected interconnect pads, said memory chip cube mounted on the planar surface of the base substrate and electrically connected and mechanically bonded to selected interconnect pads located on its surface, said memory chip cube having said memory chip pairs disposed vertically and normal to the surface of said base substrate in close spacing between one another in the form of said memory chip cube mounted on the packaging wiring substrate, and having a plurality of interconnections between said interconnect pads located to interconnect said interconnection chip and said memory chip pairs; and enclosing said interconnection chips and memory cube by an enclosure covering mounted on said base substrate.
Claim 3
Dependent Claim
116 words
A method of assembling the memory chip cube package according to claim 1, wherein during the process of fabricating the memory chip pairs the memory chip pairs are formed by placing functional memory chips over other functional memory chips formed on a wafer to form a pair of spaced parallel opposing memory chips with two rows of solder balls located along opposite edges of the functional memory chips and aligned with edges of the functional memory chips on the wafer, and separating memory chip pairs from the wafer by dicing the wafer with a saw track which will cut across the solder balls and leave solder surfaces along and between opposing edges of a chip pair.
Claim 4
Dependent Claim
114 words
The method according to claim 2 wherein, during the processor of assembling the memory chip cube, the memory chip pairs are placed inside a carrier compartment and an assembly bar with one surface coated with low melting temperature solder is placed on top of the memory chip pairs which are to make up the cube with one surface of the low melting point solder on the assembly bar touching the solder along the edges between the memory chip pairs, and passing the memory chip pairs in the carrier through a furnace to melt the low melting point solder to cause the solder upon cooling to maintain the memory chip pairs in an aligned cube.
Claim 5
Dependent Claim
88 words
The method according to claim 3 wherein the solder balls have a melting point which is higher than that of the low melting point solder of the assembly bar, and the memory cube is placed during the process of assembly of the package on the base substrate and the memory chip cube is joined to the interconnect pads on the base substrate by the higher melting point solder balls by reheating the package above the melting point of the high melting point solder and removing the assembly bar.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-03-13 | 1998-09-12 | 1999-03-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-03-13 | 2002-09-12 | 2003-03-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-03-13 | 2006-09-12 | 2007-03-14 | $7700.00 | Window Closed / Lapsed |