Method of using latchup current to blow a fuse in an integrated circuit

Claim 1

A method of blowing a fuse formed in the logic of a CMOS integrated circuit which includes an inverter disposed on a semiconductor substrate, said method comprising the steps of: forming said inverter by forming a n-channel transistor disposed in a p-region of said semiconductor substrate adjacent to a p-channel transistor, said p-channel transistor being disposed in a n-region of said semiconductor substrate such that a parasitic bipolar transistor is formed therebetween; forming said fuse coupled to said inverter; raising an output node of said inverter to a potential which is higher than an existing potential of said n-region; forward biasing a source/drain region of either said n-channel or p-channel transistors, said forward biasing and raising steps turning on said parasitic bipolar transistor, thereby causing a latchup current to flow through said fuse, said latchup current being sufficiently large as to blow said fuse.

Claim 2

A method of blowing a fuse formed in the logic of a CMOS integrated circuit which includes an inverter disposed on a semiconductor substrate, said method comprising the steps of: forming said inverter by forming a n-channel transistor disposed in a p-region of said semiconductor substrate adjacent to a p-channel transistor, said p-channel transistor being disposed in a n-region of said semiconductor substrate such that a parasitic bipolar transistor is formed therebetween; forming said fuse coupled to said inverter; raising an output node of said inverter to a potential which is higher than an existing potential of said n-region; forward biasing a source/drain region of either said n-channel or p-channel transistors, said forward biasing and raising steps turning on said parasitic bipolar transistor, thereby causing a latchup current to flow through said fuse, said latchup current being sufficiently large as to blow said fuse.