Patent US5541121A successfully refreshed from Google Patents.
← Back to Patent Explorer
US5541121A Expired / Lapsed US ⏱️ 0.0 years remaining

Reduced resistance base contact method for single polysilicon bipolar transistors using extrinsic base diffusion from a diffusion source dielectric layer

Assignee: Intel Corp
•
Filing: 1995-01-30
•
Granted: 1996-07-30
•
Expires: 2015-01-30
📄 Original PDF 🌐 Google Patents 🔄 Sync Now

Abstract

Abstract A bipolar transistor (100) and a method for forming the same. A diffusion source dielectric layer (118) is deposited over a semiconductor body (101). An emitter window (116) is then etched through the diffusion source dielectric layer (118). An extrinsic base region (110) is diffused from the diffusion source dielectric layer (118). The intrinsic base region (108) is then implanted. Base-emitter spacers (120) are then formed followed by the emitter electrode (124) and emitter region (126). The extrinsic base region (110) is self-aligned to the emitter eliminating the alignment tolerances for the lateral diffusion of the extrinsic base implant and an extrinsic base implant.

Inventors

  • 👤 F. Scott Johnson

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-11-01 19:18
CPC Classifications
H; H10; H10D; H10D62/00; H10D62/10; H10D62/17; H10D62/177; H10D10/00; H10D10/01; H10D10/051; Y; Y10; Y10S; Y10S148/00; Y10S148/01

Claims Analysis

Total Claims: 16
Claim 1
Independent Claim 99 words
A method for forming a bipolar transistor in a semiconductor substrate, comprising the steps of: forming a collector region in said semiconductor substrate; depositing a diffusion source dielectric layer over said collector region; etching an emitter window in said diffusion source dielectric layer; diffusing an extrinsic base region in said collector region from said diffusion source dielectric layer; implanting an intrinsic base region in said collector region through said emitter window; and forming an emitter electrode in said emitter window and an emitter region in said intrinsic base region, said extrinsic base region being self-aligned to said emitter region.
Claim 2
Independent Claim 99 words
A method for forming a bipolar transistor in a semiconductor substrate, comprising the steps of: forming a collector region in said semiconductor substrate; depositing a diffusion source dielectric layer over said collector region; etching an emitter window in said diffusion source dielectric layer; diffusing an extrinsic base region in said collector region from said diffusion source dielectric layer; implanting an intrinsic base region in said collector region through said emitter window; and forming an emitter electrode in said emitter window and an emitter region in said intrinsic base region, said extrinsic base region being self-aligned to said emitter region.
Claim 3
Dependent Claim 14 words
The method of claim 1 wherein said diffusion source dielectric layer comprises silicate glass.
Claim 4
Dependent Claim 23 words
The method of claim 1 wherein said diffusion source dielectric layer comprises a layer of silicon nitride over a layer of silicate glass.
Claim 5
Dependent Claim 22 words
The method of claim 1 wherein said diffusion source dielectric layer comprises a layer of oxide over a layer of silicon germanium.
Claim 6
Dependent Claim 39 words
The method of claim 1, wherein said step of diffusing said extrinsic base region includes the step of forming a screen oxide layer in said emitter window and wherein said intrinsic base region is implanted through said screen oxide.
Claim 7
Dependent Claim 33 words
The method of claim 1, further comprising the step of siliciding said emitter electrode and forming a silicide contact over said extrinsic base region, said silicide contact being self-aligned to said emitter electrode.
Claim 8
Dependent Claim 20 words
The method of claim 6, wherein said silicide contact is formed on only one side of said extrinsic base region.
Claim 9
Independent Claim 108 words
A method of forming a single polysilicon bipolar transistor comprising the steps of: forming a collector region in a semiconductor body; depositing a diffusion source dielectric layer over said collector region; etching an emitter window in said diffusion source dielectric layer; forming a screen oxide layer in said emitter window and diffusing an extrinsic base region from said diffusion source dielectric layer; implanting an intrinsic base region through said screen oxide layer; forming base-emitter spacers in said emitter window; and forming an emitter electrode in said emitter window and an emitter region in said intrinsic base region, wherein said extrinsic base region is self-aligned to said emitter region.
Claim 10
Independent Claim 108 words
A method of forming a single polysilicon bipolar transistor comprising the steps of: forming a collector region in a semiconductor body; depositing a diffusion source dielectric layer over said collector region; etching an emitter window in said diffusion source dielectric layer; forming a screen oxide layer in said emitter window and diffusing an extrinsic base region from said diffusion source dielectric layer; implanting an intrinsic base region through said screen oxide layer; forming base-emitter spacers in said emitter window; and forming an emitter electrode in said emitter window and an emitter region in said intrinsic base region, wherein said extrinsic base region is self-aligned to said emitter region.
Claim 11
Dependent Claim 25 words
The method of claim 8, wherein said emitter electrode extends less than 0.5 microns over at least one side of said diffusion source dielectric layer.
Claim 12
Dependent Claim 14 words
The method of claim 8 wherein said diffusion source dielectric layer comprises silicate glass.
Claim 13
Dependent Claim 23 words
The method of claim 8 wherein said diffusion source dielectric layer comprises a layer of silicon nitride over a layer of silicate glass.
Claim 14
Dependent Claim 22 words
The method of claim 8 wherein said diffusion source dielectric layer comprises a layer of oxide over a layer of silicon germanium.
Claim 15
Dependent Claim 24 words
The method of claim 8, further comprising the step of siliciding said emitter electrode and forming a silicide contact over said extrinsic base region.
Claim 16
Dependent Claim 20 words
The method of claim 13, wherein said silicide contact is formed on only one side of said extrinsic base region.

References Cited (Backward Citations)

US4006046A Cited
JPS5269273A Cited
JPS558818A Cited
US5086016A Cited
US5385850A Cited
US5480816A Cited
US5234846A Cited

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1999-07-30 2000-01-29 2000-07-30 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2003-07-30 2004-01-29 2004-07-30 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2007-07-30 2008-01-29 2008-07-30 $7700.00 Window Closed / Lapsed

Assigned Categories & Tags

No categories assigned to this patent yet.

Assign Category Tag