US5385850A
Expired / Lapsed
US
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Method of forming a doped region in a semiconductor substrate utilizing a sacrificial epitaxial silicon layer
Assignee: International Business Machines Corp
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Filing: 1991-02-07
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Granted: 1995-01-31
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Expires: 2011-02-07
Abstract
Abstract A low temperature, epitaxial, in situ doped semiconductor layer is used as a sacrificial dopant source. The resulting doped region is small-dimensioned with a tightly controlled dopant concentration. The dopant layer is oxidized in a relatively low-temperature environment, and removed by etching. The process can be used to form a vertical bipolar transistor, where the doped region is the base, and wherein portions of the oxidized dopant layer are left as insulators.
Inventors
- 👤 Jack O. Chu
- 👤 Chang-Ming Hsieh
- 👤 Victor R. Nastasi
- 👤 Martin Revitz
- 👤 Paul A. Ronsheim
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-01 16:37
CPC Classifications
H; H10; H10D; H10D10/00; H10D10/01; H10D10/051; H10P; H10P32/00; H10P32/10; H10P32/14; H10P32/1408; H10P32/1414; H10P32/17; H10P32/171
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
128 words
A method of forming a doped region in a semiconductor substrate, comprising the steps of: providing a semiconductor substrate; forming a layer of in situ doped epitaxial semiconductor material at a temperature of less than about 700 degrees centigrade over an area on said semiconductor substrate where said doped region is to be formed said in situ doping providing a substantially constant dopant concentration throughout the thickness of said layer; heating in a nonoxidizing environment to drive dopant from said epitaxial semiconductor layer into said substrate so as to form said doped region; oxidizing substantially said entire epitaxial semiconductor layer at a temperature of less than about 650 degrees centigrade; and removing at least a portion of the oxidized layer to expose the surface of said doped region.
Claim 2
Independent Claim
128 words
A method of forming a doped region in a semiconductor substrate, comprising the steps of: providing a semiconductor substrate; forming a layer of in situ doped epitaxial semiconductor material at a temperature of less than about 700 degrees centigrade over an area on said semiconductor substrate where said doped region is to be formed said in situ doping providing a substantially constant dopant concentration throughout the thickness of said layer; heating in a nonoxidizing environment to drive dopant from said epitaxial semiconductor layer into said substrate so as to form said doped region; oxidizing substantially said entire epitaxial semiconductor layer at a temperature of less than about 650 degrees centigrade; and removing at least a portion of the oxidized layer to expose the surface of said doped region.
Claim 3
Dependent Claim
28 words
A method in accordance with claim 1 wherein said step of forming said epitaxial silicon layer is performed at a temperature in the range of 550-650 degrees centigrade.
Claim 4
Dependent Claim
33 words
A method in accordance with claim 1 wherein said step of oxidizing said epitaxial silicon layer is performed at a temperature of about 600 degrees centigrade and a pressure of about 20 atmospheres.
Claim 5
Independent Claim
134 words
A method of forming a bipolar transistor, comprising the steps of: providing a semiconductor substrate including a first region of a first conductivity type; forming a layer of in situ doped epitaxial semiconductor material at a temperature of less than about 700 degrees centigrade over said first region, said epitaxial semiconductor layer of a second conductivity type; heating in a nonoxidizing environment to drive dopant from said epitaxial semiconductor layer into said substrate, whereby to form a second region of said second conductivity type in said first region; oxidizing said epitaxial semiconductor layer at a temperature of less than about 650 degrees centigrade; removing at least a portion of the oxidized layer to expose the surface of said second region; and forming a third region of said first conductivity type in said second region.
Claim 6
Independent Claim
134 words
A method of forming a bipolar transistor, comprising the steps of: providing a semiconductor substrate including a first region of a first conductivity type; forming a layer of in situ doped epitaxial semiconductor material at a temperature of less than about 700 degrees centigrade over said first region, said epitaxial semiconductor layer of a second conductivity type; heating in a nonoxidizing environment to drive dopant from said epitaxial semiconductor layer into said substrate, whereby to form a second region of said second conductivity type in said first region; oxidizing said epitaxial semiconductor layer at a temperature of less than about 650 degrees centigrade; removing at least a portion of the oxidized layer to expose the surface of said second region; and forming a third region of said first conductivity type in said second region.
Claim 7
Dependent Claim
28 words
A method in accordance with claim 4 wherein said step of forming said epitaxial silicon layer is performed at a temperature in the range of 550-650 degrees centigrade.
Claim 8
Dependent Claim
33 words
A method in accordance with claim 4 wherein said step of oxidizing said epitaxial silicon layer is performed at a temperature of about 600 degrees centigrade and a pressure of about 20 atmospheres.
Claim 9
Dependent Claim
29 words
A method in accordance with claim 4 wherein said bipolar transistor comprises a vertical bipolar transistor and said second region comprises the base region of said vertical bipolar transistor.
Claim 10
Dependent Claim
23 words
A method in accordance with claim 4 wherein a portion of the oxidized epitaxial silicon layer remains as an insulator between conductive regions.
Claim 11
Dependent Claim
21 words
A method in accordance with claim 1 where said epitaxial layer is formed to a thickness of less than 30 nanometers.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
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| 3.5 Years (Year 4) | 1998-01-30 | 1998-08-01 | 1999-01-31 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-01-30 | 2002-08-01 | 2003-01-31 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-01-30 | 2006-08-01 | 2007-01-31 | $7700.00 | Window Closed / Lapsed |