Microprocessor having a run/stop pin for accessing an idle mode

Claim 3

The method of claim 1 wherein said step d further comprises controlling a pipeline sequencer so that the decoder and microcode sequencer are not allowed to issue microinstructions to the execution unit.

Claim 4

The method of claim 1 further comprising a step of asserting an acknowledge pin after execution of the decoder has been halted at the subsequent instruction boundary.

Claim 7

The method of claim 4 wherein said processor includes a control unit including a pipeline sequencer and said step d further comprises controlling said pipeline sequencer so that the decoder is not allowed to issue microinstructions to the execution unit.

Claim 8

The method of claim 4 further comprising a step of asserting an acknowledge pin after execution of the decoder has been halted at said subsequent instruction boundary.

Claim 9

The method of claim 4 wherein said microprocessor includes a control unit and further comprising a step, responsive to said step a, of signaling a high priority interrupt in said control unit so that said high priority interrupt initiates said steps b-d.

Claim 10

The method of claim 4 wherein said microprocessor includes a microcode sequencing unit :coupled to said decoder and said execution unit, said microcode sequencing unit supplying a predetermined sequence of microinstructions responsive to said currently executing macroinstruction, and wherein: step b includes supplying the execution unit with microinstructions from said microcode sequencing unit until completion of said predetermined microinstruction sequence associated with said currently executing macroinstruction; and step d includes signaling said microcode sequencing unit to prevent issuance of any microinstructions therefrom.

Claim 13

The method of claim 9 further comprising a step of deasserting the acknowledge pin responsive to deassertion of said external pin in said step e.

Claim 14

The method of claim 9 wherein said processor includes a control unit including a pipeline sequencer and step d includes controlling said pipeline sequencer so that the decoder is not allowed to supply instructions to the pipeline, and wherein said step f includes controlling the pipeline sequencer so that the decoder is allowed to supply microinstructions to the execution unit.

Claim 15

The method of claim 9 wherein said microprocessor includes a control unit and further comprising a step, responsive to said step a, of signaling a high priority interrupt in said control unit so that said high priority interrupt initiates said steps b-d.

Claim 16

The method of claim 9 wherein said microprocessor includes a microcode sequencing unit coupled to said decoder and said execution unit, said microcode sequencing unit supplying a predetermined sequence of microinstructions responsive to said currently executing macroinstruction, wherein: step b includes supplying the execution unit with microinstructions from said microcode sequencing unit until completion of said predetermined sequence associated with said currently executing microinstruction; and step d includes signaling said microcode sequencing unit to prevent issuance of any microinstructions therefrom.

Claim 17

In a microprocessor that is executing a sequence of macroinstructions, a method for placing said microprocessor in an idle state and executing externally-provided instructions, said microprocessor including: (i) an external pin, (ii) an instruction port for receiving externally-provided instructions from a source external to the microprocessor, (iii) a decoder circuit for receiving macroinstructions in sequence and issuing at least one microinstruction in response to each macroinstruction in the sequence, and (iv) an execution unit for executing the microinstructions, the execution unit coupled to both the instruction port and the decoder circuit, the microprocessor having a processor state associated therewith during execution, the method comprising the steps of: a) decoding macroinstructions into microinstructions and sequentially applying the microinstructions to the execution unit for execution; b) detecting assertion of said external pin responsive to an external signal; c) continuing to decode and execute microinstructions originating from the macroinstruction executing when the external signal is asserted in step b until the microprocessor state is next updated responsive to said currently executed macroinstruction; d) while said external pin remains asserted subsequent to step c, signaling the decoder to prevent issuance of any microinstructions to the execution unit to place said microprocessor in an idle state; flushing the execution unit of all microinstructions when execution of the currently executing macroinstructions is complete following step c; and e) during said idle state, transferring instructions from the external source to the execution unit via the instruction port.

Claim 18

In a microprocessor that is executing a sequence of macroinstructions, a method for placing said microprocessor in an idle state and executing externally-provided instructions, said microprocessor including: (i) an external pin, (ii) an instruction port for receiving externally-provided instructions from a source external to the microprocessor, (iii) a decoder circuit for receiving macroinstructions in sequence and issuing at least one microinstruction in response to each macroinstruction in the sequence, and (iv) an execution unit for executing the microinstructions, the execution unit coupled to both the instruction port and the decoder circuit, the microprocessor having a processor state associated therewith during execution, the method comprising the steps of: a) decoding macroinstructions into microinstructions and sequentially applying the microinstructions to the execution unit for execution; b) detecting assertion of said external pin responsive to an external signal; c) continuing to decode and execute microinstructions originating from the macroinstruction executing when the external signal is asserted in step b until the microprocessor state is next updated responsive to said currently executed macroinstruction; d) while said external pin remains asserted subsequent to step c, signaling the decoder to prevent issuance of any microinstructions to the execution unit to place said microprocessor in an idle state; flushing the execution unit of all microinstructions when execution of the currently executing macroinstructions is complete following step c; and e) during said idle state, transferring instructions from the external source to the execution unit via the instruction port.

Claim 19

The method of claim 14 further comprising the step responsive to said step c of asserting an acknowledge signal to signify that said microprocessor has been placed in said idle state.

Claim 20

The method of claim 14 further comprising the step, responsive to deassertion of said external pin, of removing said processor from said idle state and issuing microinstructions from the decoder circuit to the execution unit for execution.

Claim 21

The method of claim 14 further comprising the steps of: asserting an acknowledge signal upon completion of step d to signify that said processor is in said idle state; and deasserting the acknowledge signal responsive to deassertion of said external pin to remove said processor from said idle state and allow the decoder to supply microinstructions to the execution unit for execution.

Claim 22

The method of claim 14 wherein said microprocessor includes a microcode sequencing unit coupled to said decoder and said execution unit, said microcode sequencing unit supplying a predetermined sequence of microinstructions responsive to said currently executing macroinstruction, wherein: step b includes supplying the execution unit with microinstructions from said microcode sequencing unit until completion of said predetermined sequence associated with said currently executing microinstruction; and step d includes signaling said microcode sequencing unit to prevent issuance of any microinstructions therefrom.

Claim 23

In a microprocessor that is executing a sequence of macroinstructions, a method for placing said microprocessor in an idle state and executing externally-provided instructions, said microprocessor including: (i) a run/stop pin, (ii) an instruction port for receiving externally-provided instructions from a source external to the microprocessor, (iii) a decoder circuit and microcode sequencing unit for receiving macroinstructions in sequence and issuing at least one microinstruction in response to each macroinstruction in the sequence, and (iv) an execution unit for executing the microinstructions, the execution unit coupled to both the instruction port and the decoder circuit, the microprocessor having a processor state associated therewith during execution, the method comprising the steps of: a) decoding macroinstructions into microinstructions and sequentially applying the microinstructions to the execution unit for execution; b) detecting assertion of the run/stop pin responsive to an external signal; c) continuing to decode and execute microinstructions originating from the macroinstruction executing when the external signal is asserted in step b until the microprocessor state is next updated responsive to said currently executed macroinstruction, and then flushing the execution unit of all microinstructions therein; d) while the run/stop pin remains asserted subsequent to step c, signaling the decoder and microcode sequencing unit to prevent issuance of any microinstructions to the execution unit, and then asserting an acknowledge signal to signify that said microprocessor has been placed in an idle state; e) during said idle state, transferring instructions from the external source to the execution unit via the instruction port; and f) deasserting the run/stop pin, removing said processor from said idle state and issuing microinstructions from the decoder circuit to the execution unit for execution.

Claim 24

In a microprocessor that is executing a sequence of macroinstructions, a method for placing said microprocessor in an idle state and executing externally-provided instructions, said microprocessor including: (i) a run/stop pin, (ii) an instruction port for receiving externally-provided instructions from a source external to the microprocessor, (iii) a decoder circuit and microcode sequencing unit for receiving macroinstructions in sequence and issuing at least one microinstruction in response to each macroinstruction in the sequence, and (iv) an execution unit for executing the microinstructions, the execution unit coupled to both the instruction port and the decoder circuit, the microprocessor having a processor state associated therewith during execution, the method comprising the steps of: a) decoding macroinstructions into microinstructions and sequentially applying the microinstructions to the execution unit for execution; b) detecting assertion of the run/stop pin responsive to an external signal; c) continuing to decode and execute microinstructions originating from the macroinstruction executing when the external signal is asserted in step b until the microprocessor state is next updated responsive to said currently executed macroinstruction, and then flushing the execution unit of all microinstructions therein; d) while the run/stop pin remains asserted subsequent to step c, signaling the decoder and microcode sequencing unit to prevent issuance of any microinstructions to the execution unit, and then asserting an acknowledge signal to signify that said microprocessor has been placed in an idle state; e) during said idle state, transferring instructions from the external source to the execution unit via the instruction port; and f) deasserting the run/stop pin, removing said processor from said idle state and issuing microinstructions from the decoder circuit to the execution unit for execution.