US5486481A — Method for forming a lateral bipolar transistor

Claim 1

Independent Claim 226 words

A method for making a lateral bipolar transistor comprising the steps of: forming an isolated semiconductor tub of a first conductivity type; etching a first trench and a second trench in the isolated semiconductor tub; filling the first and second trenches with doped polycrystalline semiconductor material of a second conductivity type to form a first and a second filled trench, wherein the first filled trench forms an emitter region and the second filled trench forms a collector region, and wherein that portion of the semiconductor tub between emitter region and the collector region forms a base region; forming a doped polycrystalline semiconductor layer of the first conductivity type on the isolated semiconductor tub between the emitter and collector regions; forming a first spacer on the emitter region; forming a second spacer on the collector region; forming a first extension doped in the second conductivity type such that the first extension is coupled to the first spacer, wherein the first extension extends laterally beyond the isolated semiconductor tub; forming a second extension doped in the second conductivity type such that the second extension is coupled to the second spacer, wherein the second extension extends laterally beyond the isolated semiconductor tub; forming a base electrode on the doped polycrystalline semiconductor layer; forming an emitter electrode on the first extension; and forming a collector electrode on the second extension.

Claim 2

Independent Claim 226 words

A method for making a lateral bipolar transistor comprising the steps of: forming an isolated semiconductor tub of a first conductivity type; etching a first trench and a second trench in the isolated semiconductor tub; filling the first and second trenches with doped polycrystalline semiconductor material of a second conductivity type to form a first and a second filled trench, wherein the first filled trench forms an emitter region and the second filled trench forms a collector region, and wherein that portion of the semiconductor tub between emitter region and the collector region forms a base region; forming a doped polycrystalline semiconductor layer of the first conductivity type on the isolated semiconductor tub between the emitter and collector regions; forming a first spacer on the emitter region; forming a second spacer on the collector region; forming a first extension doped in the second conductivity type such that the first extension is coupled to the first spacer, wherein the first extension extends laterally beyond the isolated semiconductor tub; forming a second extension doped in the second conductivity type such that the second extension is coupled to the second spacer, wherein the second extension extends laterally beyond the isolated semiconductor tub; forming a base electrode on the doped polycrystalline semiconductor layer; forming an emitter electrode on the first extension; and forming a collector electrode on the second extension.

Claim 3

Dependent Claim 41 words

The method of claim 1 wherein the step of etching the first trench and the second trench includes etching the first trench and the second trench such that the emitter region and the collector region are self-aligned to the base region.

Claim 4

Dependent Claim 37 words

The method of claim 1 wherein the step of etching the first trench and the second trench includes etching the first trench and the second trench such that the emitter region and the collector region are interchangeable.

Claim 5

Dependent Claim 34 words

The method of claim 1 further comprising the step of diffusing dopant of the first conductivity type from the doped polycrystalline semiconductor layer into the isolated semiconductor tub to form a base enhancement region.

Claim 6

Dependent Claim 42 words

The method of claim 1 wherein the steps of forming the emitter electrode and the collector electrode include forming the emitter electrode and the collector electrode such that the emitter electrode and the collector electrode are away from the isolated semiconductor tub.

Claim 7

Dependent Claim 42 words

The method of claim 1 wherein the steps of forming the first extension and the second extension include forming a first polysilicon extension and forming a second polysilicon extension, each having a sheet resistance on an order of 50 to 150 ohms/square.

Claim 8

Dependent Claim 105 words

The method of claim 1 wherein the step of forming the isolated semiconductor tub includes forming the isolated semiconductor tub having a dopant concentration on an order of 1×10 16 to 2×10 16 atoms/cm 3 , and wherein the step of filling the first and second trenches includes filling the first and second trenches with the doped polycrystalline semiconductor material having a surface dopant concentration on an order of 1×10 19 to 1×10 20 atoms/cm 3 , and wherein the step of forming the doped polycrystalline semiconductor layer includes forming the polycrystalline semiconductor layer having a dopant concentration greater than 1×10 20 atoms/cm 3 .

Claim 9

Dependent Claim 284 words

A process for forming a bipolar semiconductor device comprising the steps of: providing a substrate having an isolated active device region of a first conductivity type; forming a filled vertical trench emitter region of a second conductivity type in the isolated active device region; forming a filled vertical trench collector region of a second conductivity type in the isolated active device region, wherein the filled vertical trench emitter and collector regions are self-aligned and interchangeable, and wherein that portion of the isolated active device region between the filled vertical trench emitter and collector regions forms a base region; forming a polycrystalline semiconductor region above the isolated active device region between the filled vertical trench emitter and collector regions, wherein the polycrystalline semiconductor region is doped with dopant of the first conductivity type; forming first polysilicon spacer on the filled vertical trench emitter region; forming a second polysilicon spacer on the filled vertical trench collector region, wherein the first and second polysilicon spacers are doped with dopant of the second conductivity type; forming a first polysilicon extension above the isolated active device regions, wherein one end of the first polysilicon extension is coupled to the first polysilicon spacer, and wherein the first polysilicon extension is doped with dopant of the second conductivity type; forming a second polysilicon extension above the isolated active device region, wherein one end of the second polysilicon extension is coupled to the second polysilicon spacer, and wherein the second polysilicon extension is doped with dopant of the second conductivity type; forming a base ohmic contact on the polycrystalline semiconductor region; forming an emitter ohmic contact on the first polysilicon extension; and forming a collector ohmic contact on the second polysilicon extension.

Claim 10

Dependent Claim 284 words

A process for forming a bipolar semiconductor device comprising the steps of: providing a substrate having an isolated active device region of a first conductivity type; forming a filled vertical trench emitter region of a second conductivity type in the isolated active device region; forming a filled vertical trench collector region of a second conductivity type in the isolated active device region, wherein the filled vertical trench emitter and collector regions are self-aligned and interchangeable, and wherein that portion of the isolated active device region between the filled vertical trench emitter and collector regions forms a base region; forming a polycrystalline semiconductor region above the isolated active device region between the filled vertical trench emitter and collector regions, wherein the polycrystalline semiconductor region is doped with dopant of the first conductivity type; forming first polysilicon spacer on the filled vertical trench emitter region; forming a second polysilicon spacer on the filled vertical trench collector region, wherein the first and second polysilicon spacers are doped with dopant of the second conductivity type; forming a first polysilicon extension above the isolated active device regions, wherein one end of the first polysilicon extension is coupled to the first polysilicon spacer, and wherein the first polysilicon extension is doped with dopant of the second conductivity type; forming a second polysilicon extension above the isolated active device region, wherein one end of the second polysilicon extension is coupled to the second polysilicon spacer, and wherein the second polysilicon extension is doped with dopant of the second conductivity type; forming a base ohmic contact on the polycrystalline semiconductor region; forming an emitter ohmic contact on the first polysilicon extension; and forming a collector ohmic contact on the second polysilicon extension.

Claim 11

Dependent Claim 26 words

The process of claim 8 further comprising the step of diffusing dopant from the polycrystalline semiconductor region into the base region to form an enhancement region.

Claim 12

Dependent Claim 85 words

The process of claim 8 wherein the step of forming the base ohmic contact includes forming the base ohmic contact having a silicide portion disposed directly on the polycrystalline semiconductor region, and wherein the step of forming the emitter ohmic contact includes forming the emitter ohmic contact having a silicide portion disposed directly on the first polysilicon extension, and wherein the step of forming the collector ohmic contact includes forming the collector ohmic contact having a silicide portion disposed directly on the second polysilicon extension.

Claim 13

Dependent Claim 25 words

The process of claim 8 further comprising the step of forming dielectric spacers between the first and second polysilicon spacers and the polycrystalline semiconductor region.

Claim 14

Dependent Claim 39 words

The process of claim 8 wherein the steps of forming the first and second polysilicon extensions includes forming the first and second polysilicon extensions such that the first and second polysilicon extensions terminate beyond the isolated active device region.

Claim 15

Dependent Claim 36 words

The process of claim 8 wherein the steps of forming the first and second polysilicon extensions includes forming the first and second polysilicon extensions having a sheet resistance on an order of 50 to 150 ohms/square.

Claim 16

Dependent Claim 51 words

The process of claim 8 wherein the steps of forming the filled vertical trench emitter and collector regions include forming the filled vertical trench emitter and collector regions such that the filled vertical trench emitter and collector regions are separated by a distance on an order of 0.1 to 1.0 micrometers.

Claim 17

Dependent Claim 55 words

The process of claim 8 wherein the steps of forming the filled vertical trench emitter and collector regions include forming the filled vertical trench emitter and collector regions such that the filled vertical trench emitter and collector regions have a surface dopant concentration on an order of 1×10 19 to 1×10 20 atoms/cm 3 .

Claim 18

Dependent Claim 31 words

The process of claim 8 wherein the step of forming the polycrystalline semiconductor region includes forming the polycrystalline semiconductor region having a dopant concentration greater than 1×10 20 atoms/cm 3 .

Claim 19

Independent Claim 187 words

A method for forming a lateral bipolar transistor structure comprising the step of: forming a pair of filled vertical trenches of a first conductivity type in a semiconductor tub of a second conductivity type, wherein the filled vertical trenches are filled with a polycrystalline semiconductor material, and wherein the pair of filled vertical trenches are self-aligned and spaced a distance apart, and wherein that portion of the semiconductor tub between the pair of filled vertical trenches forms a base, and wherein one of the pair of filled vertical trenches forms an emitter and another of the pair of filled vertical trenches forms a collector; forming a first spacer on the emitter; forming a second spacer on the collector; forming a first extension doped in the second conductivity type such that the first extension is coupled to the first spacer; forming a second extension doped in the second conductivity type such that the second extension is coupled to the second spacer; forming a base electrode coupled to the base; forming an emitter electrode coupled to the first extension; and forming a collector electrode coupled to the second extension.

Claim 20

Independent Claim 187 words

A method for forming a lateral bipolar transistor structure comprising the step of: forming a pair of filled vertical trenches of a first conductivity type in a semiconductor tub of a second conductivity type, wherein the filled vertical trenches are filled with a polycrystalline semiconductor material, and wherein the pair of filled vertical trenches are self-aligned and spaced a distance apart, and wherein that portion of the semiconductor tub between the pair of filled vertical trenches forms a base, and wherein one of the pair of filled vertical trenches forms an emitter and another of the pair of filled vertical trenches forms a collector; forming a first spacer on the emitter; forming a second spacer on the collector; forming a first extension doped in the second conductivity type such that the first extension is coupled to the first spacer; forming a second extension doped in the second conductivity type such that the second extension is coupled to the second spacer; forming a base electrode coupled to the base; forming an emitter electrode coupled to the first extension; and forming a collector electrode coupled to the second extension.

Claim 21

Dependent Claim 17 words

The method of claim 17 wherein the distance is on an order of 0.1 to 1.0 micrometers.

Annuity Stage	Window Opens	Payment Deadline	Surcharge Period Until	Estimated Fee	Status
3.5 Years (Year 4)	1999-01-22	1999-07-24	2000-01-23	$2000.00	Window Closed / Lapsed
7.5 Years (Year 8)	2003-01-22	2003-07-24	2004-01-23	$3760.00	Window Closed / Lapsed
11.5 Years (Year 12)	2007-01-22	2007-07-24	2008-01-23	$7700.00	Window Closed / Lapsed

Method for forming a lateral bipolar transistor

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