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Method and apparatus for producing conductive layers or structures for VLSI circuits

Assignee: Infineon Technologies AG
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Filing: 1992-03-13
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Granted: 1995-12-26
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Expires: 2012-03-13
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Abstract

Abstract Methods and apparatus for producing conductive layers or structures for VLSI circuits. In a method for producing conductive layers or structures for VLSI circuits, at least two method stages are implemented in direct succession in different chambers of a high-vacuum system without interrupting the high-vacuum conditions for the semiconductor substrate. Avoiding exposure to air between the method stages produces noticeably improved layer properties and enables particularly simple and reliable multi-stage methods for producing conductive layers that promote a multi-layer wiring on the semiconductor substrate. An apparatus for implementing the method has a plurality of high-vacuum process chambers, at least one high-vacuum distributor chamber connecting the process chambers and of at least two high-vacuum supply chambers for semiconductor substrates.

Inventors

  • 👤 Heinrich Koerner
  • 👤 Helmuth Treichel
  • 👤 Konrad Hieber
  • 👤 Peter Kuecher

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-31 05:16
CPC Classifications
H; H10; H10D; H10D64/00; H10D64/01; H10D64/011; H10D64/0111; Y; Y10; Y10S; Y10S438/00; Y10S438/907; Y10S438/908

Claims Analysis

Total Claims: 4
Claim 1
Independent Claim 244 words
A multi-stage method for producing conductive layers for VLSI circuits on a semiconductor substrate, a conductive layer at least partially covering a surface of the substrate, the method having at least two method stages in at least two chambers of a high-vacuum system while maintaining the high-vacuum conditions for the semiconductor substrate, in a plurality of method stages, the method comprising the steps of: plasma etching a surface of the semiconductor substrate for removing oxides; applying a titanium layer 10 through 100 nm thick on the surface of the semiconductor substrate using a sputtering process or by chemical deposition from a vapor phase at a temperature in the range from 200° C. through 450° C.; applying a titanium nitride layer with a CVD process at a temperature of 200° C. through 450° C. using a nitrogen-containing, organic titanium compound that is excited by one of thermal, optical and plasma excitation; applying one of an aluminum layer or an aluminum alloy layer with a CVD process at a temperature from 200° C. through 450° C. using an organic aluminum compound that is excited by at least one of thermal, optical and plasma excitation; applying a metallic layer that contains at least one of copper, refractory metal palladium, and silicon with a sputtering process or a CVD process; and brief-duration heating of the semiconductor substrate to a temperature up to 500° C. for 10 seconds through 120 seconds in an inert gas atmosphere for alloy formation.
Claim 2
Dependent Claim 244 words
A multi-stage method for producing conductive layers for VLSI circuits on a semiconductor substrate, a conductive layer at least partially covering a surface of the substrate, the method having at least two method stages in at least two chambers of a high-vacuum system while maintaining the high-vacuum conditions for the semiconductor substrate, in a plurality of method stages, the method comprising the steps of: plasma etching a surface of the semiconductor substrate for removing oxides; applying a titanium layer 10 through 100 nm thick on the surface of the semiconductor substrate using a sputtering process or by chemical deposition from a vapor phase at a temperature in the range from 200° C. through 450° C.; applying a titanium nitride layer with a CVD process at a temperature of 200° C. through 450° C. using a nitrogen-containing, organic titanium compound that is excited by one of thermal, optical and plasma excitation; applying one of an aluminum layer or an aluminum alloy layer with a CVD process at a temperature from 200° C. through 450° C. using an organic aluminum compound that is excited by at least one of thermal, optical and plasma excitation; applying a metallic layer that contains at least one of copper, refractory metal palladium, and silicon with a sputtering process or a CVD process; and brief-duration heating of the semiconductor substrate to a temperature up to 500° C. for 10 seconds through 120 seconds in an inert gas atmosphere for alloy formation.
Claim 3
Dependent Claim 30 words
The method according to claim 1, wherein the method step of applying the titanium nitride layer comprises adding a reducing agent selected from the group consisting of hydrogen and ammonia.
Claim 4
Dependent Claim 34 words
The method according to claim 2, wherein ammonia is selected as the reducing agent and thermal excitation of the nitrogen-containing organic titanium compound is provided at a temperature of 200° C. through 400° C.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1998-12-25 1999-06-26 1999-12-26 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 2002-12-25 2003-06-26 2003-12-26 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2006-12-25 2007-06-26 2007-12-26 $7700.00 Window Closed / Lapsed

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