Patent US5420055A successfully refreshed from Google Patents.
US5420055A
Expired / Lapsed
US
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Reduction of parasitic effects in floating body MOSFETs
Assignee: Callahan Cellular LLC
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Filing: 1993-11-16
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Granted: 1995-05-30
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Expires: 2013-11-16
Abstract
Abstract A semiconductor fabrication method improves the voltage characteristic of floating-body MOSFETs by creating recombination centers near the source-body junction of the device. A MOSFET is fabricated through the passivation oxidation stage, and a photolithography step is used to expose the source region. Implantation is then performed using one of two types of material. A first type creates electron traps of predetermined energy in the vicinity of the source-body junction. A second type creates defects in the crystalline structure of the semiconductor material. Both implantation types create recombination centers in the material. This allows the discharge through the source-body junction of charges built up in the body region.
Inventors
- 👤 Duy-Phach Vu
- 👤 Ngwe K. Cheong
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-04 23:31
CPC Classifications
H; H04; H04N; H04N9/00; H04N9/12; H04N9/31; H04N9/3141; G; G02; G02B; G02B27/00; G02B27/0093; G09; G09G; G09G3/00; G09G3/20; G09G3/22; G09G3/30; G09G3/34; G09G3/36; H04N5/00; H04N5/74; H04N5/7416; H04N5/7441; H10; H10D; H10D86/00; H10D86/01; G09G2300/00; G09G2300/02; G09G2300/023; G09G2300/08; G09G2300/0809; G09G2300/0842; G09G2320/00; G09G2320/02; G09G2320/0233; G09G2320/04; G09G2320/041; G09G2320/043; G09G2340/00; G09G2340/04; G09G2340/0464; G09G2370/00; G09G2370/04; G09G2370/042; G09G3/3607; G09G3/3611; G09G3/3614; G09G3/3648; H04N5/66; H04N5/70; H04N5/7475; H04N5/7491
Claims Analysis
Total Claims: 20
Claim 1
Independent Claim
100 words
A method of fabricating a floating-body semiconductor device comprising: providing a semiconductor material; fabricating within the semiconductor material a source region of a first conductivity type and a drain region; fabricating within the semiconductor material adjacent the source region a channel region of a second conductivity type, such that a conductivity junction is formed between the channel region and the source region; selectively implanting silicon in the semiconductor material adjacent the conductivity junction to cause formation of defects adjacent to the junction without implanting the drain region; and annealing the semiconductor material at a temperature below about 1000 degrees centigrade.
Claim 2
Independent Claim
100 words
A method of fabricating a floating-body semiconductor device comprising: providing a semiconductor material; fabricating within the semiconductor material a source region of a first conductivity type and a drain region; fabricating within the semiconductor material adjacent the source region a channel region of a second conductivity type, such that a conductivity junction is formed between the channel region and the source region; selectively implanting silicon in the semiconductor material adjacent the conductivity junction to cause formation of defects adjacent to the junction without implanting the drain region; and annealing the semiconductor material at a temperature below about 1000 degrees centigrade.
Claim 3
Dependent Claim
18 words
The method of claim 1 wherein the step of implanting silicon creates crystalline defects in the semiconductor material.
Claim 4
Dependent Claim
19 words
The method of claim 1 wherein an implantation energy is in the range of 100 KeV to 300 KeV.
Claim 5
Dependent Claim
21 words
The method of claim 1 wherein the annealing is performed in a nitrogen atmosphere at a temperature of about 1000° C.
Claim 6
Dependent Claim
11 words
The method of claim 1 wherein the device is a MOSFET.
Claim 7
Dependent Claim
23 words
The method of claim 1 further comprising fabricating a drain region to a side of the channel region away from the source region.
Claim 8
Dependent Claim
25 words
The method of claim 6 further comprising preventing the implanted silicon from being positioned adjacent a junction between the channel region and the drain region.
Claim 9
Independent Claim
138 words
A method of fabricating a floating-body MOSFET comprising: providing a region of silicon over an insulating substrate; doping the silicon to produce a source region and a drain region each of a first conductivity type separated by a channel region of a second conductivity type such that conductivity junctions exist between the source and channel regions and between the drain and channel regions; selectively implanting a material adjacent to the junction between the source and channel regions without implanting the drain region to create a defect region adjacent to the junction between the source and channel regions to enhance recombination in the defect region, the implanted material being selected from the group consisting of silicon and sulfur; annealing the semiconductor material at a temperature below about 800 degrees centigrade; and attaching contacts to the source and drain regions.
Claim 10
Independent Claim
138 words
A method of fabricating a floating-body MOSFET comprising: providing a region of silicon over an insulating substrate; doping the silicon to produce a source region and a drain region each of a first conductivity type separated by a channel region of a second conductivity type such that conductivity junctions exist between the source and channel regions and between the drain and channel regions; selectively implanting a material adjacent to the junction between the source and channel regions without implanting the drain region to create a defect region adjacent to the junction between the source and channel regions to enhance recombination in the defect region, the implanted material being selected from the group consisting of silicon and sulfur; annealing the semiconductor material at a temperature below about 800 degrees centigrade; and attaching contacts to the source and drain regions.
Claim 11
Independent Claim
76 words
A method of improving the current-voltage characteristic of a floating-body MOSFET having source, drain and channel regions formed in silicon over an insulating substrate comprising: selectively implanting near a junction between the source region and the channel region, and without implanting the drain region a material which creates recombination centers in the silicon, the implanted material being selected from the group consisting of silicon and sulfur; and annealing at a temperature below about 800 degrees centigrade.
Claim 12
Independent Claim
76 words
A method of improving the current-voltage characteristic of a floating-body MOSFET having source, drain and channel regions formed in silicon over an insulating substrate comprising: selectively implanting near a junction between the source region and the channel region, and without implanting the drain region a material which creates recombination centers in the silicon, the implanted material being selected from the group consisting of silicon and sulfur; and annealing at a temperature below about 800 degrees centigrade.
Claim 13
Dependent Claim
25 words
The method of claim 9 wherein implanting a material comprises implanting a material which creates electron traps of particular energy in the silicon channel region.
Claim 14
Dependent Claim
22 words
The method of claim 9 wherein implanting a material comprises implanting a material which creates crystalline defects in the silicon channel region.
Claim 15
Independent Claim
91 words
A method of fabricating a floating-body semiconductor device comprising: providing a semiconductor material; fabricating within the semiconductor material a source region of a first conductivity type; fabricating within the semiconductor material adjacent the source region a channel region of a second conductivity type, such that a conductivity junction is formed between the channel region and the source region; selectively implanting sulfur in the semiconductor material adjacent the conductivity junction to cause formation of defects adjacent to the junction; and annealing the semiconductor material at a temperature below about 1000 degrees centigrade.
Claim 16
Independent Claim
91 words
A method of fabricating a floating-body semiconductor device comprising: providing a semiconductor material; fabricating within the semiconductor material a source region of a first conductivity type; fabricating within the semiconductor material adjacent the source region a channel region of a second conductivity type, such that a conductivity junction is formed between the channel region and the source region; selectively implanting sulfur in the semiconductor material adjacent the conductivity junction to cause formation of defects adjacent to the junction; and annealing the semiconductor material at a temperature below about 1000 degrees centigrade.
Claim 17
Dependent Claim
16 words
The method of claim 12 wherein the implanted material creates electron traps of particular energy levels.
Claim 18
Dependent Claim
18 words
The method of claim 12 wherein an implantation energy is in the range of 100 to 300 KeV.
Claim 19
Dependent Claim
22 words
The method of claim 12 wherein the annealing is performed at a temperature in the range of 400 to 600 degrees centigrade.
Claim 20
Dependent Claim
21 words
The method of claim 12 wherein the annealing is performed in a nitrogen atmosphere at a temperature of about 1000° C.
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USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-05-29 | 1998-11-28 | 1999-05-30 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-05-29 | 2002-11-28 | 2003-05-30 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-05-29 | 2006-11-28 | 2007-05-30 | $7700.00 | Window Closed / Lapsed |