Method of fabricating storage capacitors using high dielectric constant materials

Claim 1

A method of forming a plurality of high dielectric capacitors on a substrate having regions of silicon dioxide and regions of silicon on the upper surface of said substrate, said upper surface being substantially planar, comprising the steps of: forming a barrier layer, other than silicon dioxide, over the upper surface, the barrier layer having a thickness equal to the sum of the thickness of a lower electrode and a high-dielectric constant material to be subsequently formed; forming a resist layer over the barrier layer; forming a pattern in the resist layer, the pattern having openings above selected ones of the silicon regions; removing the barrier layer below the openings in the resist to expose the selected silicon regions; forming a conductive layer over the patterned resist layer and the selected silicon regions to form the lower electrode of the capacitors; removing the resist layer and the conductive layer over the resist layer to expose the barrier layer; forming a layer of high-dielectric constant material, where ε is greater than about 400, over the conductive layer and the patterned barrier layer; chemical-mechanically polishing the high dielectric layer to remove the high dielectric layer above the barrier layer and to form a substantially planar surface having an upper surface of the patterned barrier layer and regions of high-dielectric constant material above the conductive layer in openings of the patterned barrier layer; and forming an upper electrode on the upper surface above respective regions of the high-dielectric constant material.

Claim 2

A method of forming a plurality of high dielectric capacitors on a substrate having regions of silicon dioxide and regions of silicon on the upper surface of said substrate, said upper surface being substantially planar, comprising the steps of: forming a barrier layer, other than silicon dioxide, over the upper surface, the barrier layer having a thickness equal to the sum of the thickness of a lower electrode and a high-dielectric constant material to be subsequently formed; forming a resist layer over the barrier layer; forming a pattern in the resist layer, the pattern having openings above selected ones of the silicon regions; removing the barrier layer below the openings in the resist to expose the selected silicon regions; forming a conductive layer over the patterned resist layer and the selected silicon regions to form the lower electrode of the capacitors; removing the resist layer and the conductive layer over the resist layer to expose the barrier layer; forming a layer of high-dielectric constant material, where ε is greater than about 400, over the conductive layer and the patterned barrier layer; chemical-mechanically polishing the high dielectric layer to remove the high dielectric layer above the barrier layer and to form a substantially planar surface having an upper surface of the patterned barrier layer and regions of high-dielectric constant material above the conductive layer in openings of the patterned barrier layer; and forming an upper electrode on the upper surface above respective regions of the high-dielectric constant material.