US5070026A
Expired / Lapsed
US
⏱️ 0.0 years remaining
Process of making a ferroelectric electronic component and product
Assignee: Spire Corp
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Filing: 1989-06-26
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Granted: 1991-12-03
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Expires: 2009-06-26
Abstract
Abstract An improved process of making a ferroelectric electronic component, such as a non-volatile RAM or an electro-optic switching array, is disclosed. The process essentially includes the separate formation of two subassemblies and then connecting them by placing one on top of the other. Electrical contacts are made by "bumping" or other "flip chip" techniques.
Inventors
- 👤 Anton C. Greenwald
- 👤 Bobby L. Buchanan
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-10-28 20:03
CPC Classifications
H; H10; H10B; H10B53/00
Claims Analysis
Total Claims: 13
Claim 1
Independent Claim
121 words
An MOCVD process of making a nonvolatile random access memory component comprising: (a) forming by MOCVD a first subassembly on a first substrate; (b) depositing by MOCVD a smooth conductive layer of a noble metal on said first substrate; (c) depositing by MOCVD a ferroelectric material on said smooth conductive layer; (d) forming MOCVD a second subassembly on a second substrate, said first substrate and said second substrate being formed of the same material; (e) depositing by MOCVD an integrated circuit on said second substrate; (f) forming a plurality of electrical contacts on said integrated circuit; and (c) connecting said two subassemblies by placing one on top of the other such that said electrical contacts abut said layer of ferroelectric material.
Claim 2
Dependent Claim
121 words
An MOCVD process of making a nonvolatile random access memory component comprising: (a) forming by MOCVD a first subassembly on a first substrate; (b) depositing by MOCVD a smooth conductive layer of a noble metal on said first substrate; (c) depositing by MOCVD a ferroelectric material on said smooth conductive layer; (d) forming MOCVD a second subassembly on a second substrate, said first substrate and said second substrate being formed of the same material; (e) depositing by MOCVD an integrated circuit on said second substrate; (f) forming a plurality of electrical contacts on said integrated circuit; and (c) connecting said two subassemblies by placing one on top of the other such that said electrical contacts abut said layer of ferroelectric material.
Claim 3
Dependent Claim
21 words
The process of claim 1 wherein said substrate material is one of a group consisting of silicon, gallium arsenide, and sapphire.
Claim 4
Dependent Claim
22 words
The process of claim 1 wherein said layer of ferroelectric material is one of a group consisting of PZT, PZLT, and lead-germanate.
Claim 5
Dependent Claim
35 words
The process of claim 1 wherein said smooth conductive layer is characterized by a crystal lattice structure and a thermal coefficient compatible with said ferroelectric material to enable its MOCVD deposition on said first substrate.
Claim 6
Dependent Claim
30 words
The process of claim 4 wherein said conductive layer is one of a group consisting of noble metals, gold and platinum, and conductive oxides, SnO 2 and InSnO 2 .
Claim 7
Dependent Claim
20 words
The process of claim 1 wherein said electrical contacts provided on said integrated circuit are formed of indium or gold.
Claim 8
Dependent Claim
106 words
A process of making an optoelectronic switching array comprising: (a) providing a first GaAs substrate; (b) forming by sputtering a conductive layer on said first substrate; (c) forming by sputtering a layer of ferroelectric material on said conductive layer; (d) providing a second GaAs substrate; (e) forming by sputtering an integrated circuit on said second GaAs substrate; (f) forming a plurality of electrical contacts on said integrated circuit; and (g) connecting the two subassemblies respectively formed on each of said first and second GaAs substrates by placing one on top of the other so that said plurality of electrical contacts abut said layer of ferroelectric material.
Claim 9
Dependent Claim
106 words
A process of making an optoelectronic switching array comprising: (a) providing a first GaAs substrate; (b) forming by sputtering a conductive layer on said first substrate; (c) forming by sputtering a layer of ferroelectric material on said conductive layer; (d) providing a second GaAs substrate; (e) forming by sputtering an integrated circuit on said second GaAs substrate; (f) forming a plurality of electrical contacts on said integrated circuit; and (g) connecting the two subassemblies respectively formed on each of said first and second GaAs substrates by placing one on top of the other so that said plurality of electrical contacts abut said layer of ferroelectric material.
Claim 10
Dependent Claim
32 words
The process of claim 7 wherein said first and second GaAs substrates are first polished and cleaned by chemical solutions in ultrasonic baths, followed by sputter etching the surfaces of said substrates.
Claim 11
Dependent Claim
21 words
The process of claim 7 wherein said plurality of electrical contacts on said integrated circuit are formed by tape automated bonding.
Claim 12
Dependent Claim
49 words
The process of claim 7 wherein said layer of ferroelectric material is one of a group consisting of PZT and PLZT, and lead-germanate and, wherein said conductive layer is one of a group consisting of noble metals, gold and platinum, and conductive oxides, SnO 2 and InSnO 2 .
Claim 13
Dependent Claim
21 words
The process of claim 7 wherein said plurality of electrical contacts on said integrated circuit are formed by flip chip bonding.
References Cited (Backward Citations)
US3368920A
Cited
US3689992A
Cited
US3443170A
Cited
US3997690A
Cited
US4056654A
Cited
US4079284A
Cited
JPS53148294A
Cited
US4149302A
Cited
JPS6323123A
Cited
US4954458A
Cited
JPS5935098A
Cited
US4636908A
Cited
US4715680A
Cited
EP0173368A2
Cited
JPS61169013A
Cited
US4926051A
Cited
JPS645999A
Cited
US4895812A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1994-12-02 | 1995-06-03 | 1995-12-03 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 1998-12-02 | 1999-06-03 | 1999-12-03 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2002-12-02 | 2003-06-03 | 2003-12-03 | $7700.00 | Window Closed / Lapsed |