Patent US5397936A successfully refreshed from Google Patents.
US5397936A
Expired / Lapsed
US
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Input voltage-induced spurious current canceler for autozero type comparator in analog-to-digital converters
Assignee: Industrial Technology Research Institute
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Filing: 1993-05-03
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Granted: 1995-03-14
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Expires: 2013-05-03
Abstract
Abstract In an autozero type MOSFET comparator, the spurious current induced by the high frequency input voltage can flow through the resistance of the reset switch to introduce an offset voltage error during the autozero mode. A canceler is used to prevent the spurious current from flowing through the reset switch. A T-network with two series capacitors and a shunt switch is used as the canceler. The spurious current is by-passed by the shunt switch and prevented from flowing through the reset switch placed at the output of the T-network. The spurious current canceler is particularly useful for a sub-ranging ADC, where the comparator is used also as a sample-and-hold circuit to hold the input voltage across the series capacitors by opening all the sampling switches, the reset switch and the shunt switch.
Inventors
- 👤 Yunn-Hwa Wang
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-06 12:43
CPC Classifications
H; H03; H03K; H03K5/00; H03K5/22; H03K5/24; H03K5/2472; H03K5/249
Claims Analysis
Total Claims: 11
Claim 1
Independent Claim
222 words
An autozero-type comparator for an analog-to-digital converter (ADC) having an autozero mode of operation and a compare mode of operation, comprising: an inverter having an input terminal and an output terminal; a reset switch connected between said input terminal and said output terminal of said inverter; a first sampling switch with input terminal connected to an analog signal and an output terminal; a second sampling switch with input terminal connected to a reference voltage and an output terminal; joint means for connecting said output terminals of said first sampling switch said second sampling switch; a T-network having two capacitors connected in series between said joint means and said input terminal of said inverter, and a shunting switch connected between the common joint between between said capacitors and an ac ground; during said autozero mode, said first sampling switch being on, said second sampling switch being off, said reset switch being on, and said shunting switch being on, so that a spurious current induced by said analog signal can be canceled; during said compare mode, said first sampling switch being off, said second sampling switch being on, said reset switch being off, and said shunting switch being off so that a voltage difference between said analog signal and said reference voltage can be compared and amplified at said output terminal of said inverter.
Claim 2
Dependent Claim
222 words
An autozero-type comparator for an analog-to-digital converter (ADC) having an autozero mode of operation and a compare mode of operation, comprising: an inverter having an input terminal and an output terminal; a reset switch connected between said input terminal and said output terminal of said inverter; a first sampling switch with input terminal connected to an analog signal and an output terminal; a second sampling switch with input terminal connected to a reference voltage and an output terminal; joint means for connecting said output terminals of said first sampling switch said second sampling switch; a T-network having two capacitors connected in series between said joint means and said input terminal of said inverter, and a shunting switch connected between the common joint between between said capacitors and an ac ground; during said autozero mode, said first sampling switch being on, said second sampling switch being off, said reset switch being on, and said shunting switch being on, so that a spurious current induced by said analog signal can be canceled; during said compare mode, said first sampling switch being off, said second sampling switch being on, said reset switch being off, and said shunting switch being off so that a voltage difference between said analog signal and said reference voltage can be compared and amplified at said output terminal of said inverter.
Claim 3
Dependent Claim
15 words
An autozero-type comparator as described in claim 1, wherein said ADC is a sub-ranging type.
Claim 4
Dependent Claim
39 words
An autozero-type comparator as described in claim 2, wherein said comparator serves as a sample-and-hold circuit, in which the differential voltage between the input analog voltage and the reference voltage is held in said two capacitors in said T-network.
Claim 5
Dependent Claim
16 words
An autozero-type comparator as described in claim 1, wherein said shunting switch is an MOS transistor.
Claim 6
Dependent Claim
28 words
An autozero-type comparator as described in claim 1, wherein said ac ground connected to said shunting switch is the ground terminal of the supply voltage for said inverter.
Claim 7
Dependent Claim
26 words
An autozero type comparator as described in claim 1, wherein said ac ground connected to said shunting switch is the positive power supply for said inverter.
Claim 8
Dependent Claim
37 words
An autozero-type comparator as described in claim 1, wherein said shunting switch is a pair of complementary MOS transistors, connected respectively to the positive supply and the negative power supply of said inverter as said ac ground.
Claim 9
Dependent Claim
44 words
An autozero-type comparator as described in claim 1, wherein said ADC is a sub-ranging type with a coarse analog-to-digital conversion for the more significant bits of total digital signals and a fine analog-to-digital conversion for the less significant bits of said total digital signals.
Claim 10
Dependent Claim
15 words
An autozero-type comparator as described in claim 8, wherein said comparator performs a sample-and-hold function.
Claim 11
Dependent Claim
20 words
An autozero-type comparator as described in claim 9, wherein said hold function is implemented by turning off all said switches.
References Cited (Backward Citations)
US3676702A
Cited
US4211942A
Cited
US4656429A
Cited
US4845383A
Cited
US4560890A
Cited
US4695748A
Cited
US4816701A
Cited
US5010338A
Cited
US4947168A
Cited
US5075688A
Cited
USPTO Annuity & Maintenance Windows
| Annuity Stage | Window Opens | Payment Deadline | Surcharge Period Until | Estimated Fee | Status |
|---|---|---|---|---|---|
| 3.5 Years (Year 4) | 1998-03-13 | 1998-09-12 | 1999-03-14 | $2000.00 | Window Closed / Lapsed |
| 7.5 Years (Year 8) | 2002-03-13 | 2002-09-12 | 2003-03-14 | $3760.00 | Window Closed / Lapsed |
| 11.5 Years (Year 12) | 2006-03-13 | 2006-09-12 | 2007-03-14 | $7700.00 | Window Closed / Lapsed |