Comparator circuit

Claim 2

A comparator circuit comprising: threshold circuit means, said threshold circuit means including a pair of semiconductor devices, each of said semiconductor devices having a conduction path and a control electrode for controlling the conduction by said conduction path, the conduction paths of said pair of semiconductors connected in series with each other and forming a common junction therebetween, the control electrodes of said pair of semiconductors connected together, and voltage source means connected across the series connected conduction paths of said pair of semiconductors such that said threshold circuit quiescently utilizes a prescribed operating point intermediate the limits of said voltage source means, a plurality of signal sources, storage means connected to the control electrodes of said pair of semiconductors in said threshold circuit means such that said storage means supplies a signal to said threshold circuit representative of the signals supplied by said signal sources, and switching means selectively connecting said storage means to one of said signal sources such that said threshold circuit means produces a signal representative of the condition of said one signal source.

Claim 3

The comparator circuit recited in claim 1 wherein said switching means includes first and second switching circuits connected between said storage means and different ones of said plurality of signal sources.

Claim 4

The comparator circuit recited in claim 1 wherein said switching means includes signal supplying means which selectively energizes said switching means to cause the connection between said storage means and said plurality of signal sources, said signal supplying means adapted to produce complementary output signals for application to said switching means.

Claim 5

The comparator circuit recited in claim 1 including second switch means connected from the connected together control electrodes of said pair of semiconductors of said threshold circuit means to the common junction of said series connected conduction paths of said pair of semiconductors.

Claim 6

The comparator circuit recited in claim 2 wherein said first and second switching circuits each comprise a pair of opposite conductivity type semiconductors, each of said semiconductors having a conduction path and a control electrode for controlling the conduction by said conduction path, each pair of opposite conductivity type semiconductors having the conduction paths thereof connected in parallel with each other and the control electrodes thereof connected to receive complementary control signals from said switching means, said first and second switching circuits connected to receive said control signals out-of-phase such that only one of said first and second switching circuits is conducting at a time.

Claim 7

The comparator circuit recited in claim 1 including second threshold circuit means connected to said first mentioned threshold circuit mEans, said second threshold circuit means including a second pair of semiconductor devices each having a conduction path and a control electrode for controlling the conduction by said conduction path, the conduction paths of said second pair of semiconductors connected in series with each other and forming a second common junction therebetween, the control electrodes of said second pair of semiconductors connected together, and voltage source means connected across the series connected conduction paths of said second pair of semiconductors such that said second threshold circuit quiescently utilizes a prescribed operating point intermediate the limits of said voltage source means, second storage means connected to the control electrodes of said pair of semiconductors in said second threshold circuit means such that said second storage means supplies a signal to said second threshold circuit representative of the signals supplied by said first mentioned threshold circuit means, and second switching means connected to said first mentioned switching means and operative therewith, said second switching means selectively controlling the operation of said second threshold circuit means.

Claim 8

A comparator circuit including first terminal means for receiving a reference signal, second terminal means for receiving a signal to be monitored, threshold circuit means, storage means connected to said threshold circuit means, first switch means connected from said first terminal means to said storage means, second switch means connected from said second terminal means to said storage means, and control means for selectively activating said first and second switch means alternatively whereby said storage means stores information representative of the relationship between the reference signal and the monitored signal selectively applied thereto via said first and second switch means, said threshold circuit means operative to produce an output signal representative of the information stored by said storage means whereby the relationship between the reference signal and the monitored signal is detected.

Claim 9

A comparator circuit including first terminal means for receiving a reference signal, second terminal means for receiving a signal to be monitored, threshold circuit means, storage means connected to said threshold circuit means, first switch means connected from said first terminal means to said storage means, second switch means connected from said second terminal means to said storage means, and control means for selectively activating said first and second switch means alternatively whereby said storage means stores information representative of the relationship between the reference signal and the monitored signal selectively applied thereto via said first and second switch means, said threshold circuit means operative to produce an output signal representative of the information stored by said storage means whereby the relationship between the reference signal and the monitored signal is detected.

Claim 10

The comparator circuit recited in claim 7 wherein said threshold circuit means includes input and output terminals, said input terminal of said threshold circuit means connected to said storage means, and feedback circuit means connected from the output terminal of said threshold circuit to the input terminal thereof, said feedback means including third switch means connected to and activated by said control means.

Claim 11

A comparator circuit comprising, a pair of opposite conductivity MOS type semiconductors, each of said semiconductors having a conduction path defined by first and second electrodes and a third electrode for controlling the conduction in said conduction path, one of said first and second electrodes of each of said pair of semiconductors connected together in a common connection such that said conduction paths of said pair of semiconductors are connected in series, source means connected to the other of said first and second electrodes of said pair of semiconductors to apply a voltage across said series connected conduction paths, first and second input means, switch means connected to each of said first and second input means, storage means connected from said switch means to a common junction of said third electrodes of each of said pair of semiconductors, said switch means adapted to selectively effect an electrical connection from one of said first and second input means to said storage means, switchable feedback means connected from the common connection between said conduction paths of said pair of semiconductors to said common junction of said third electrodes of each of said pair of semiconductors, and signal supplying means for supplying signals to said switch means and to said switchable feedback means to control the operation thereof.

Claim 12

A comparator circuit comprising, a pair of opposite conductivity MOS type semiconductors, each of said semiconductors having a conduction path defined by first and second electrodes and a third electrode for controlling the conduction in said conduction path, one of said first and second electrodes of each of said pair of semiconductors connected together in a common connection such that said conduction paths of said pair of semiconductors are connected in series, source means connected to the other of said first and second electrodes of said pair of semiconductors to apply a voltage across said series connected conduction paths, first and second input means, switch means connected to each of said first and second input means, storage means connected from said switch means to a common junction of said third electrodes of each of said pair of semiconductors, said switch means adapted to selectively effect an electrical connection from one of said first and second input means to said storage means, switchable feedback means connected from the common connection between said conduction paths of said pair of semiconductors to said common junction of said third electrodes of each of said pair of semiconductors, and signal supplying means for supplying signals to said switch means and to said switchable feedback means to control the operation thereof.

Claim 13

In combination, a first input terminal for Receiving signals, a second input terminal for receiving signals, first switch means having one terminal thereof connected to said first input terminal, second switch means having one terminal thereof connected to said second input terminal, storage means having one terminal thereof connected to a further terminal of each of said first and second switch means, strobe means for supplying strobe signals which selectively activate said first and second switch means alternatively, inverter means having the input terminal thereof connected to a further terminal of said storage means, said inverter means producing an output signal level in accordance with the signal supplied to the input terminal thereof by said storage means, said signal supplied by said storage means being representative of the relationship between the signals received at said first and second input terminals.

Claim 14

In combination, a first input terminal for Receiving signals, a second input terminal for receiving signals, first switch means having one terminal thereof connected to said first input terminal, second switch means having one terminal thereof connected to said second input terminal, storage means having one terminal thereof connected to a further terminal of each of said first and second switch means, strobe means for supplying strobe signals which selectively activate said first and second switch means alternatively, inverter means having the input terminal thereof connected to a further terminal of said storage means, said inverter means producing an output signal level in accordance with the signal supplied to the input terminal thereof by said storage means, said signal supplied by said storage means being representative of the relationship between the signals received at said first and second input terminals.

Claim 15

The combination recited in claim 10 including second storage means having one terminal thereof connected to receive the output signal from said first mentioned inverter means, and second inverter means having the input terminal thereof connected to a further terminal of said second storage means.