Semiconductor integrated circuit for producing activation signals at different cycle times

Claim 1

A semiconductor integrated circuit comprising: n number of operating circuits that operate at a predetermined time interval, wherein n is a positive integer; a number of wirings respectively connected to said n number of operating circuits; and selective drive means comprising n number of input signal pass means for passing an input signal, n number of driver means for receiving an input signal from said input signal pass means for outputting an activation signal, and n number of pass control means for controlling said input signal pass means in response to a rise of power supply voltage at power on, the selective drive means responsive to only one input signal for generating activation signals and transmitting said activation signals to said n number of wirings in order to activate said operating circuits in different cycle times, the activating portions of said activation signals not being overlapped with each other; wherein each said input signal pass means comprises a transfer gate having a pair of transistors of opposite conductivity types, one of said pass control means comprising a capacitor for controlling one of said input signal pass means to one state which permits passing said input signal, and another of said pass control means comprises a resistor for controlling another of said input signal pass means to another state which permits passing said input signal.