Patent US5376562A successfully refreshed from Google Patents.
US5376562A
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Method for forming vertical transistor structures having bipolar and MOS devices
Assignee: NXP USA Inc
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Filing: 1993-05-24
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Granted: 1994-12-27
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Expires: 2013-05-24
Abstract
Abstract A transistor is formed as either a bipolar transistor (10) or an MOS transistor (11). Each transistor (10 or 11) has a substrate (12). Bipolar transistor (10) has a first current electrode (26) underlying a control electrode (28), and a second current electrode (32) overlying the control electrode (28). MOS transistor (11) has a first current electrode (54) underlying a channel region (56), and a source lightly doped region (58) and a source heavily doped region (60) overlying the channel region (56). A control electrode conductive layer (40) is laterally adjacent a sidewall dielectric layer (48), and sidewall dielectric layer (48) is laterally adjacent channel region (56). Conductive layer (40) functions as a gate electrode for transistor (11). Each of the transistors (10 and 11) is vertically integrated such as in a vertically integrated BiMOS circuit. Transistors (10 and 11) can be electrically isolated by isolation ( 64 and 66).
Inventors
- 👤 Jon T. Fitch
- 👤 Carlos A. Mazure
- 👤 Keith E. Witek
- 👤 James D. Hayden
Bibliographic Details
Application Number
—
Jurisdiction
US
Data Source
google_patents
Last Synchronized
2026-11-09 00:23
CPC Classifications
H; H10; H10D; H10D84/00; H10D10/00; H10D10/01; H10D10/051; H10D10/054; H10D10/40; H10D30/00; H10D30/01; H10D30/021; H10D30/025; H10D30/031; H10D30/0318; H10D30/0321; H10D30/60; H10D30/63; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D88/00; H10D88/01
Claims Analysis
Total Claims: 36
Claim 1
Independent Claim
208 words
A method of forming a transistor useful for further vertical integration comprising the steps of: providing a base layer having a surface; forming a first dielectric layer overlying the base layer; forming a control electrode conductive layer overlying the first dielectric layer; forming a second dielectric layer overlying the control electrode conductive layer; removing portions of each of the first dielectric layer, the control electrode conductive layer, and the second dielectric layer, to form a device opening which exposes the base layer and forms a sidewall of the control electrode conductive layer; forming a sidewall dielectric layer laterally adjacent the sidewall of the control electrode conductive layer; forming a first current electrode of a first conductivity type within the device opening, the first current electrode being laterally adjacent the first dielectric layer, and overlying the base layer; forming a control electrode of a second conductivity type within the device opening, the control electrode being laterally adjacent a bottom portion of the sidewall dielectric layer, and overlying the first current electrode; removing the sidewall dielectric layer; electrically connecting the control electrode conductive layer to the control electrode; and forming a second current electrode of the first conductivity type within the device opening and overlying the control electrode conductive layer.
Claim 2
Independent Claim
208 words
A method of forming a transistor useful for further vertical integration comprising the steps of: providing a base layer having a surface; forming a first dielectric layer overlying the base layer; forming a control electrode conductive layer overlying the first dielectric layer; forming a second dielectric layer overlying the control electrode conductive layer; removing portions of each of the first dielectric layer, the control electrode conductive layer, and the second dielectric layer, to form a device opening which exposes the base layer and forms a sidewall of the control electrode conductive layer; forming a sidewall dielectric layer laterally adjacent the sidewall of the control electrode conductive layer; forming a first current electrode of a first conductivity type within the device opening, the first current electrode being laterally adjacent the first dielectric layer, and overlying the base layer; forming a control electrode of a second conductivity type within the device opening, the control electrode being laterally adjacent a bottom portion of the sidewall dielectric layer, and overlying the first current electrode; removing the sidewall dielectric layer; electrically connecting the control electrode conductive layer to the control electrode; and forming a second current electrode of the first conductivity type within the device opening and overlying the control electrode conductive layer.
Claim 3
Dependent Claim
36 words
The method of claim 1 wherein the step of forming a second current electrode further comprises the step of: forming a sidewall spacer laterally adjacent the control electrode conductive layer before forming the second current electrode.
Claim 4
Dependent Claim
43 words
The method of claim 1 wherein the steps of forming the first current electrode, the control electrode and the second current electrode further comprises the step of: forming the first current electrode, the control electrode, and the second current electrode as epitaxial regions.
Claim 5
Dependent Claim
55 words
The method of claim 1 wherein the steps of forming the first current electrode, the control electrode and the second current electrode further comprises the step of: using in-situ doping to dope the first current electrode, the control electrode, and the second current electrode with dopant atoms to obtain said first and second conductivity types.
Claim 6
Dependent Claim
34 words
The method of claim 1 wherein the step of removing portions further comprises the step of: using a non-selective etch to remove portions of the second dielectric layer and the control electrode conductive layer.
Claim 7
Dependent Claim
43 words
The method of claim 1 wherein the step of forming the sidewall dielectric further comprises the step of: etching the sidewall of the control electrode conductive layer to laterally recess the sidewall of the control electrode conductive layer before forming the sidewall dielectric.
Claim 8
Dependent Claim
169 words
The method of claim 1 wherein the step of removing portions further comprises the steps of: forming a masking layer overlying the second dielectric layer, the masking layer having a mask opening; etching a portion of the second dielectric layer exposed by the mask opening to form a portion of the device opening in the second dielectric layer which is self-aligned to the mask opening and exposing a portion of the control electrode conductive layer; etching the exposed portion of the control electrode conductive layer to form a portion of the device opening in the control electrode conductive layer which is self-aligned to the portion of the device opening in the second dielectric layer and exposes a portion of the first dielectric layer; and etching the exposed portion of the first dielectric layer to form a portion of the device opening in the first dielectric layer which is self-aligned to the portion of the device opening in the control electrode conductive layer and exposes the surface of the substrate.
Claim 9
Dependent Claim
41 words
The method of claim 1 further comprising a step of forming a diffusion region of the first conductivity type within the base layer and exposed at the surface of the base layer, the diffusion region being self-aligned to said device opening.
Claim 10
Dependent Claim
56 words
The method of claim 1 further comprising the steps of: forming a diffusion region of the first conductivity type in the base layer and being exposed at the surface of the base layer, the diffusion region being formed prior to the step of forming the control electrode conductive layer, said device opening overlying the diffusion region.
Claim 11
Dependent Claim
37 words
The method of claim 1 wherein the step of connecting the control electrode conductive layer to the control electrode further comprises connecting the control electrode conductive layer to the control electrode by using an epitaxial growth step.
Claim 12
Independent Claim
109 words
A method of forming a first transistor and a second transistor comprising the steps of: forming the first transistor with a first current electrode that underlies a second current electrode thereof, the first transistor being a transistor selected from a group consisting of: an MOS transistor and a bipolar transistor; and forming the second transistor overlying the first transistor, the second transistor having a first current electrode that underlies a second current electrode thereof, the second transistor being a transistor selected from a group of: an MOS transistor and a bipolar transistor, wherein at least one of either the first transistor or the second transistor is a bipolar transistor.
Claim 13
Independent Claim
109 words
A method of forming a first transistor and a second transistor comprising the steps of: forming the first transistor with a first current electrode that underlies a second current electrode thereof, the first transistor being a transistor selected from a group consisting of: an MOS transistor and a bipolar transistor; and forming the second transistor overlying the first transistor, the second transistor having a first current electrode that underlies a second current electrode thereof, the second transistor being a transistor selected from a group of: an MOS transistor and a bipolar transistor, wherein at least one of either the first transistor or the second transistor is a bipolar transistor.
Claim 14
Dependent Claim
106 words
The method of claim 11 further comprising the steps of: forming an isolation region overlying the second current electrode of the first transistor, the isolation region separating the first and second transistors; and forming the first transistor and the second transistor as MOS transistors wherein the first current electrode and second current electrode of the first transistor are respectively either a source electrode and a drain electrode or a drain electrode and a source electrode, and the first current electrode and second current electrode of the second transistor are respectively either a source electrode and a drain electrode or a drain electrode and a source electrode.
Claim 15
Dependent Claim
110 words
The method of claim 11 further comprising the steps of: forming an isolation region overlying the second current electrode of the first transistor, the isolation region separating the first and second transistors; and forming the first transistor as an MOS transistor and the second transistor as a bipolar transistor, the first current electrode and second current electrode of the first transistor are respectively either a source electrode and a drain electrode or a drain electrode and a source electrode, and the first current electrode and second current electrode of the second transistor are respectively either an emitter electrode and a collector electrode or a collector electrode and an emitter electrode.
Claim 16
Dependent Claim
110 words
The method of claim 11 further comprising the steps of: forming an isolation region overlying the second current electrode of the first transistor, the isolation region separating the first and second transistors; and forming the first transistor as a bipolar transistor and the second transistor as an MOS transistor, the first current electrode and second current electrode of the first transistor are respectively either an emitter electrode and a collector electrode or a collector electrode and an emitter electrode, and the first current electrode and second current electrode of the second transistor are respectively either a source electrode and a drain electrode or a drain electrode and a source electrode.
Claim 17
Dependent Claim
105 words
The method of claim 11 further comprising the steps of: forming an isolation region overlying the second current electrode of the first transistor, the isolation region separating the first and second transistors; and forming the first transistor and second transistor as bipolar transistors wherein the first current electrode and second current electrode of the first transistor are respectively either an emitter electrode and a collector electrode or a collector electrode and an emitter electrode, and the first current electrode and second current electrode of the second transistor are respectively either an emitter electrode and a collector electrode or a collector electrode and an emitter electrode.
Claim 18
Dependent Claim
107 words
The method of claim 11 further comprising the step of: forming the first transistor as an MOS transistor and the second transistor as a bipolar transistor, the first current electrode and second current electrode of the first transistor are respectively either a source electrode and a drain electrode or a drain electrode and a source electrode, and the first current electrode and second current electrode of the second transistor are respectively either an emitter electrode and a collector electrode or a collector electrode and an emitter electrode, the first current electrode of the second transistor being physically connected to the second current electrode of the first transistor.
Claim 19
Dependent Claim
107 words
The method of claim 11 further comprising the steps of: forming the first transistor as a bipolar transistor and the second transistor as an MOS transistor, the first current electrode and second current electrode of the first transistor are respectively either an emitter electrode and a collector electrode or a collector electrode and an emitter electrode, and the first current electrode and second current electrode of the second transistor are respectively either a source electrode and a drain electrode or a drain electrode and a source electrode, the first current electrode of the second transistor being physically connected to the second current electrode of the first transistor.
Claim 20
Dependent Claim
102 words
The method of claim 11 further comprising the steps of: forming the first transistor and second transistor as bipolar transistors wherein the first current electrode and second current electrode of the first transistor are respectively either an emitter electrode and a collector electrode or a collector electrode and an emitter electrode, and the first current electrode and second current electrode of the second transistor are respectively either an emitter electrode and a collector electrode or a collector electrode and an emitter electrode, the first current electrode of the second transistor being physically connected to the second current electrode of the first transistor.
Claim 21
Independent Claim
114 words
A method of forming a first transistor and a second transistor comprising the steps of: forming the first transistor with a first current electrode that underlies a second current electrode thereof, the first transistor being a transistor selected from a group consisting of: an MOS transistor and a bipolar transistor; forming an isolation region which overlies the first transistor; and forming the second transistor overlying the isolation region, the second transistor having a first current electrode that underlies a second current electrode thereof, the second transistor being a transistor selected from a group consisting of: an MOS transistor and a bipolar transistor wherein the isolation region isolates the first transistor from the second transistor.
Claim 22
Independent Claim
114 words
A method of forming a first transistor and a second transistor comprising the steps of: forming the first transistor with a first current electrode that underlies a second current electrode thereof, the first transistor being a transistor selected from a group consisting of: an MOS transistor and a bipolar transistor; forming an isolation region which overlies the first transistor; and forming the second transistor overlying the isolation region, the second transistor having a first current electrode that underlies a second current electrode thereof, the second transistor being a transistor selected from a group consisting of: an MOS transistor and a bipolar transistor wherein the isolation region isolates the first transistor from the second transistor.
Claim 23
Dependent Claim
24 words
The method of claim 19 wherein the step of forming the isolation region comprises: forming the isolation region as an epitaxial region of material.
Claim 24
Dependent Claim
49 words
The method of claim 19 wherein the step of forming the isolation region comprises: forming an output conductor which is connected to the isolation region; and biasing the isolation region to a selected voltage through the output conductor to improve isolation between the first transistor and the second transistor.
Claim 25
Independent Claim
129 words
A method of forming a first transistor and a second transistor comprising the steps of: forming the first transistor with a first current electrode that underlies a second current electrode thereof, the first transistor being a transistor selected from a group consisting of: an MOS transistor and a bipolar transistor; forming an isolation region which overlies the first transistor; and forming the second transistor overlying the isolation region, the second transistor having a first current electrode that underlies a second current electrode thereof, the second transistor being a transistor selected from a group consisting of: an MOS transistor and a bipolar transistor wherein the isolation region isolates the first transistor from the second transistor and at least one of either the first or second transistors is a bipolar transistor.
Claim 26
Independent Claim
129 words
A method of forming a first transistor and a second transistor comprising the steps of: forming the first transistor with a first current electrode that underlies a second current electrode thereof, the first transistor being a transistor selected from a group consisting of: an MOS transistor and a bipolar transistor; forming an isolation region which overlies the first transistor; and forming the second transistor overlying the isolation region, the second transistor having a first current electrode that underlies a second current electrode thereof, the second transistor being a transistor selected from a group consisting of: an MOS transistor and a bipolar transistor wherein the isolation region isolates the first transistor from the second transistor and at least one of either the first or second transistors is a bipolar transistor.
Claim 27
Independent Claim
79 words
A method for forming a transistor structure comprising the steps of: forming a bipolar transistor having a first current electrode overlying a second current electrode and a base electrode separating the first and second current electrodes; and forming a metal oxide semiconductor (MOS) transistor overlying the bipolar transistor and having a source region and a drain region separated by a channel region wherein a gate electrode is adjacent the channel region and controls a conductivity of the channel region.
Claim 28
Independent Claim
79 words
A method for forming a transistor structure comprising the steps of: forming a bipolar transistor having a first current electrode overlying a second current electrode and a base electrode separating the first and second current electrodes; and forming a metal oxide semiconductor (MOS) transistor overlying the bipolar transistor and having a source region and a drain region separated by a channel region wherein a gate electrode is adjacent the channel region and controls a conductivity of the channel region.
Claim 29
Dependent Claim
35 words
The method of claim 23 wherein the first current electrode of the bipolar transistor is formed as an emitter electrode and the second current electrode of the bipolar transistor is formed as a collector electrode.
Claim 30
Dependent Claim
22 words
The method of claim 23 wherein an isolation region is formed between the bipolar transistor and the metal oxide semiconductor (MOS) transistor.
Claim 31
Independent Claim
89 words
A method for forming a transistor structure comprising the steps of: forming a metal oxide semiconductor (MOS) transistor having a first current electrode overlying a second current electrode wherein the first current electrode is separated from the second current electrode by a channel region and a gate electrode is adjacent the channel region for controlling current flow through the channel region; and forming a bipolar transistor overlying the metal oxide semiconductor (MOS) transistor, the bipolar transistor having an emitter electrode separated from a collector electrode by a base electrode.
Claim 32
Independent Claim
89 words
A method for forming a transistor structure comprising the steps of: forming a metal oxide semiconductor (MOS) transistor having a first current electrode overlying a second current electrode wherein the first current electrode is separated from the second current electrode by a channel region and a gate electrode is adjacent the channel region for controlling current flow through the channel region; and forming a bipolar transistor overlying the metal oxide semiconductor (MOS) transistor, the bipolar transistor having an emitter electrode separated from a collector electrode by a base electrode.
Claim 33
Dependent Claim
22 words
The method of claim 23 wherein an isolation region is formed between the bipolar transistor and the metal oxide semiconductor (MOS) transistor.
Claim 34
Independent Claim
70 words
A method for forming a transistor structure comprising the steps of: forming a first bipolar transistor having a first current electrode overlying a second current electrode and a base electrode separating the first and second current electrodes of the first bipolar transistor; and forming a second bipolar transistor overlying the first bipolar transistor, the second bipolar transistor having an emitter electrode separated from a collector electrode by a base electrode.
Claim 35
Independent Claim
70 words
A method for forming a transistor structure comprising the steps of: forming a first bipolar transistor having a first current electrode overlying a second current electrode and a base electrode separating the first and second current electrodes of the first bipolar transistor; and forming a second bipolar transistor overlying the first bipolar transistor, the second bipolar transistor having an emitter electrode separated from a collector electrode by a base electrode.
Claim 36
Dependent Claim
18 words
The method of claim 28 wherein an isolation region is formed between the first and second bipolar transistors.
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