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US5155058A Expired / Lapsed US ⏱️ 0.0 years remaining

Method of making semiconductor memory device

Assignee: Canon Inc
•
Filing: 1992-03-23
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Granted: 1992-10-13
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Expires: 2012-03-23
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Abstract

Abstract A semiconductor memory device has plural first transistors constituting an information memory circuit and plural second transistors constituting gate units for controlling information input and output. The plural first transistors and the plural second transistors are formed in mutually overlaying structure across an insulating layer. A heterogeneous material of a nucleation density sufficiently higher than that of the insulating layer and of a size small enough to grow a single nucleus of a semiconductor material is formed on the insulating layer. The transistors positioned on the insulating layer are formed in a monocrystalline or substantially monocrystalline semiconductor layer grown around the single nucleus formed on the different material.

Inventors

  • 👤 Shinji Fujiwara
  • 👤 Takao Yonehara

Bibliographic Details

Application Number —
Jurisdiction US
Data Source google_patents
Last Synchronized 2026-10-29 17:28
CPC Classifications
H; H10; H10D; H10D84/00; H10D84/01; H10D84/02; H10D84/03; H10D84/038; H10D88/00; H10D88/01; H10P; H10P14/00; H10P14/20; H10P14/24; H10P14/27; H10P14/271; H10P14/274; H10P14/276; H10P14/29; H10P14/2901; H10P14/2921; H10P14/34; H10P14/3402; H10P14/3404; H10P14/3411

Claims Analysis

Total Claims: 5
Claim 1
Independent Claim 155 words
A method for producing a semiconductor memory device comprising a first plurality of transistors constituting an information memory circuit and a second plurality of transistors constituting gate units for controlling information input to and output from the information memory circuit, the first plurality of transistors and the second plurality of transistors being formed in mutually overlying structure across an insulating layer, the method comprising forming either the first plurality of transistors or the second plurality of transistors by a process comprising the steps of: forming a first material, having a nucleation density sufficiently higher than that of the insulating layer, on the insulating layer in a sufficiently small area so as to form only a single nucleus from which a single crystal of a semiconductor material is grown; and growing a layer of monocrystalline semiconductor material, different from the first material, by a vapor phase process around a single nucleus grown from the first material.
Claim 2
Independent Claim 155 words
A method for producing a semiconductor memory device comprising a first plurality of transistors constituting an information memory circuit and a second plurality of transistors constituting gate units for controlling information input to and output from the information memory circuit, the first plurality of transistors and the second plurality of transistors being formed in mutually overlying structure across an insulating layer, the method comprising forming either the first plurality of transistors or the second plurality of transistors by a process comprising the steps of: forming a first material, having a nucleation density sufficiently higher than that of the insulating layer, on the insulating layer in a sufficiently small area so as to form only a single nucleus from which a single crystal of a semiconductor material is grown; and growing a layer of monocrystalline semiconductor material, different from the first material, by a vapor phase process around a single nucleus grown from the first material.
Claim 3
Dependent Claim 24 words
A method for producing a semiconductor memory device according to claim 1, wherein only the second plurality of transistors are formed by said process.
Claim 4
Independent Claim 125 words
A method for forming a semiconductor memory device comprising a first plurality of transistors constituting an information memory circuit and a second plurality of transistors constituting gate units for controlling information input to and output from said information memory circuit, said method comprising the steps of: forming an insulating layer on a substrate having said first plurality of transistors; forming a first material having a nucleation density sufficiently higher than that of said insulating layer in a small enough area so as to form only a single nucleus from which a single crystal of a semiconductor material is grown; and growing a layer of monocrystalline semiconductor material, different from said first material, by applying vapor deposition around a single nucleus grown from said first material.
Claim 5
Independent Claim 125 words
A method for forming a semiconductor memory device comprising a first plurality of transistors constituting an information memory circuit and a second plurality of transistors constituting gate units for controlling information input to and output from said information memory circuit, said method comprising the steps of: forming an insulating layer on a substrate having said first plurality of transistors; forming a first material having a nucleation density sufficiently higher than that of said insulating layer in a small enough area so as to form only a single nucleus from which a single crystal of a semiconductor material is grown; and growing a layer of monocrystalline semiconductor material, different from said first material, by applying vapor deposition around a single nucleus grown from said first material.

USPTO Annuity & Maintenance Windows

Annuity Stage Window Opens Payment Deadline Surcharge Period Until Estimated Fee Status
3.5 Years (Year 4) 1995-10-13 1996-04-13 1996-10-13 $2000.00 Window Closed / Lapsed
7.5 Years (Year 8) 1999-10-13 2000-04-13 2000-10-13 $3760.00 Window Closed / Lapsed
11.5 Years (Year 12) 2003-10-13 2004-04-13 2004-10-13 $7700.00 Window Closed / Lapsed

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