Memory card having controller providing adjustable refresh to a plurality of DRAMs

Claim 1

A memory card comprising: means for generating a reference clock having a predetermined reference clock period; a dynamic random access memory; refresh generation means for automatically initiating periodic refresh operations of said dynamic random access memory at a predetermined frequency independent of any externally applied refresh requests, the automatic initiation commencing each integer number "n" of the predetermined reference clock period; means for generating dynamic random access memory row-address-strobe-before-column-address-strobe timing signals and multiplexed addresses in response to address and control signals indicating data transfer requests from an external central processing unit, wherein the means for generating dynamic random access memory row-address-strobe-before-column-address-strobe timing and multiplexed addresses comprises a first multiplexer for generating the multiplexed addresses; means for selecting the integer number "n" such that the predetermined frequency of the dynamic random access memory refresh operations by said refresh generation means is adjustable, wherein the refresh generation means comprises a counter for counting a number of pulses of the reference clock, a comparison means for comparing the counted number of pulses to the integer number "n" received from the means for selecting, and a second multiplexer for switching said dynamic random access memory between row-address-strobe-before-column-address-strobe timing and column-address-strobe-before-row-address-strobe timing when the count of the pulses counted by said counter is equal to the number "n"; and status indication means for indicating to the external central process unit when said refresh generation means is refreshing said dynamic random access memory.